summaryrefslogtreecommitdiff
path: root/board/freescale/mx6dqscm/imximage_scm_lpddr2.cfg
blob: d95b9bcf5ec84d717638227c7ec2e15a010a0aac (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier: GPL-2.0+
 *
 * Refer docs/README.imxmage for more details about how-to configure
 * and create imximage boot image
 *
 * The syntax is taken as close as possible with the kwbimage
 */

#define __ASSEMBLY__
#include <config.h>

/* image version */

IMAGE_VERSION 2

/*
 * Boot Device : one of
 * spi, sd (the board has no nand neither onenand)
 */

BOOT_FROM	sd

#ifdef CONFIG_USE_PLUGIN
/*PLUGIN    plugin-binary-file    IRAM_FREE_START_ADDR*/
PLUGIN	board/freescale/mx6dscm/plugin.bin 0x00907000
#else

#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif

/*
 * Device Configuration Data (DCD)
 *
 * Each entry must have the format:
 * Addr-type           Address        Value
 *
 * where:
 *	Addr-type register length (1,2 or 4 bytes)
 *	Address	  absolute address of the register
 *	value	  value to be stored in the register
 */

#ifdef CONFIG_SCM_LPDDR2_512MB
/* DCD */
/* DDR clock to 400MHz */
DATA 4, 0x020C4018 0x00060324
/* AHB_ROOT_CLK change divide ratio from 4 to 3 for ENET */
DATA 4, 0x020C4014 0x00018900

DATA 4 0x020C4018 0x00060324

DATA 4 0x020e0798 0x00080000
DATA 4 0x020e0758 0x00000000

DATA 4 0x020E0588 0x00000030
DATA 4 0x020E0594 0x00000030

DATA 4 0x020E056c 0x00000030
DATA 4 0x020E0578 0x00000030
DATA 4 0x020E074c 0x00000030

DATA 4 0x020E057c 0x00000030
DATA 4 0x020E058c 0x00000000
DATA 4 0x020E059c 0x00000030
DATA 4 0x020E05a0 0x00000030
DATA 4 0x020E078c 0x00000030

DATA 4 0x020E0750 0x00020000
DATA 4 0x020E05a8 0x00003030
DATA 4 0x020E05b0 0x00003030
DATA 4 0x020E0524 0x00003030
DATA 4 0x020E051c 0x00003030
DATA 4 0x020E0518 0x00003030
DATA 4 0x020E050c 0x00003030
DATA 4 0x020E05b8 0x00003030
DATA 4 0x020E05c0 0x00003030

DATA 4 0x020E0774 0x00020000

DATA 4 0x020E0784 0x00000030
DATA 4 0x020E0788 0x00000030
DATA 4 0x020E0794 0x00000030
DATA 4 0x020E079c 0x00000030
DATA 4 0x020E07a0 0x00000030
DATA 4 0x020E07a4 0x00000030
DATA 4 0x020E07a8 0x00000030
DATA 4 0x020E0748 0x00000030

DATA 4 0x020E05ac 0x00000030
DATA 4 0x020E05b4 0x00000030
DATA 4 0x020E0528 0x00000030
DATA 4 0x020E0520 0x00000030
DATA 4 0x020E0514 0x00000030
DATA 4 0x020E0510 0x00000030
DATA 4 0x020E05bc 0x00000030
DATA 4 0x020E05c4 0x00000030

DATA 4 0x020E0590 0x00000020
DATA 4 0x020E0598 0x00000020

DATA 4 0x021b001c 0x00008000

DATA 4 0x021b085c 0x1b4700c7

DATA 4 0x021b0800 0xa1390003


DATA 4 0x021b0890 0x00400000

DATA 4 0x021b0848 0x44404044

DATA 4 0x021b0850 0x34343A38

DATA 4 0x021b083c 0x20000000
DATA 4 0x021b0840 0x00000000

DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333

DATA 4 0x021b082c 0xf3333333
DATA 4 0x021b0830 0xf3333333
DATA 4 0x021b0834 0xf3333333
DATA 4 0x021b0838 0xf3333333

DATA 4 0x021b08b8 0x00000800

DATA 4 0x021b0004 0x00020036
DATA 4 0x021b0008 0x00000000
DATA 4 0x021b000c 0x33374133

DATA 4 0x021b0010 0x00100a82

DATA 4 0x021b0014 0x00000093

DATA 4 0x021b0018 0x0000174C
DATA 4 0x021b001c 0x00008050
DATA 4 0x021b002c 0x0f9f26d2
DATA 4 0x021b0030 0x00000010
DATA 4 0x021b0038 0x00190778

/* 1-Ch Mode */
DATA 4 0x021b0040 0x0000004f

DATA 4 0x021b0000 0x83110000

/* Channel 0 */
DATA 4 0x021b001c 0x003f8030
DATA 4 0x021b001c 0xff0a8030
DATA 4 0x021b001c 0x82018030
DATA 4 0x021b001c 0x04028030
DATA 4 0x021b001c 0x04038030

DATA 4 0x021b0800 0xa1390003

DATA 4 0x021b0020 0x00001800

DATA 4 0x021b0818 0x00000000

DATA 4 0x021b0004 0x00025576

DATA 4 0x021b0404 0x00011006

DATA 4 0x021b001c 0x00000000


DATA 4 0x020c4068 0x00C03F3F
DATA 4 0x020c406c 0x0030FC03
DATA 4 0x020c4070 0x0FFFC000
DATA 4 0x020c4074 0x3FF00000
DATA 4 0x020c4078 0x00FFF300
DATA 4 0x020c407c 0x0F0000C3
DATA 4 0x020c4080 0x000003FF

/* enable AXI cache for VDOA/VPU/IPU */
DATA 4 0x020e0010 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4 0x020e0018 0x007F007F
DATA 4 0x020e001c 0x007F007F

#elif CONFIG_SCM_LPDDR2_2GB
/* DDR clock to 400MHz */
DATA 4, 0x020C4018 0x00060324
/* AHB_ROOT_CLK change divide ratio from 4 to 3 for ENET */
DATA 4, 0x020C4014 0x00018900

DATA 4, 0x020e0798, 0x00080000
DATA 4, 0x020e0758, 0x00000000



DATA 4, 0x020E0588, 0x00000030
DATA 4, 0x020E0594, 0x00000030

DATA 4, 0x020E056c, 0x00000030
DATA 4, 0x020E0578, 0x00000030
DATA 4, 0x020E074c, 0x00000030

DATA 4, 0x020E057c, 0x00000030
DATA 4, 0x020E058c, 0x00000000
DATA 4, 0x020E059c, 0x00000030
DATA 4, 0x020E05a0, 0x00000030
DATA 4, 0x020E078c, 0x00000030

DATA 4, 0x020E0750, 0x00020000
DATA 4, 0x020E05a8, 0x00003030
DATA 4, 0x020E05b0, 0x00003030
DATA 4, 0x020E0524, 0x00003030
DATA 4, 0x020E051c, 0x00003030
DATA 4, 0x020E0518, 0x00003030
DATA 4, 0x020E050c, 0x00003030
DATA 4, 0x020E05b8, 0x00003030
DATA 4, 0x020E05c0, 0x00003030

DATA 4, 0x020E0774, 0x00020000

DATA 4, 0x020E0784, 0x00000030
DATA 4, 0x020E0788, 0x00000030
DATA 4, 0x020E0794, 0x00000030
DATA 4, 0x020E079c, 0x00000030
DATA 4, 0x020E07a0, 0x00000030
DATA 4, 0x020E07a4, 0x00000030
DATA 4, 0x020E07a8, 0x00000030
DATA 4, 0x020E0748, 0x00000030

DATA 4, 0x020E05ac, 0x00000030
DATA 4, 0x020E05b4, 0x00000030
DATA 4, 0x020E0528, 0x00000030
DATA 4, 0x020E0520, 0x00000030
DATA 4, 0x020E0514, 0x00000030
DATA 4, 0x020E0510, 0x00000030
DATA 4, 0x020E05bc, 0x00000030
DATA 4, 0x020E05c4, 0x00000030



DATA 4, 0x020E0590, 0x00000020
DATA 4, 0x020E0598, 0x00000020

DATA 4, 0x021b001c, 0x00008000
DATA 4, 0x021b401c, 0x00008000

DATA 4, 0x021b085c, 0x1b4700c7
DATA 4, 0x021b485c, 0x1b4700c7

DATA 4, 0x021b0800, 0xa1390003

DATA 4, 0x021b0890, 0x00400000
DATA 4, 0x021b4890, 0x00400000

DATA 4, 0x021b0848, 0x44404044
DATA 4, 0x021b4848, 0x44443A46

DATA 4, 0x021b0850, 0x34343A38
DATA 4, 0x021b4850, 0x382F3835

DATA 4, 0x021b083c, 0x20000000
DATA 4, 0x021b0840, 0x00000000
DATA 4, 0x021b483c, 0x20000000
DATA 4, 0x021b4840, 0x00000000

DATA 4, 0x021b081c, 0x33333333
DATA 4, 0x021b0820, 0x33333333
DATA 4, 0x021b0824, 0x33333333
DATA 4, 0x021b0828, 0x33333333
DATA 4, 0x021b481c, 0x33333333
DATA 4, 0x021b4820, 0x33333333
DATA 4, 0x021b4824, 0x00000000
DATA 4, 0x021b4828, 0x33333333
DATA 4, 0x021b082c, 0xf3333333
DATA 4, 0x021b0830, 0xf3333333
DATA 4, 0x021b0834, 0xf3333333
DATA 4, 0x021b0838, 0xf3333333
DATA 4, 0x021b482c, 0xf3333333
DATA 4, 0x021b4830, 0xf3333333
DATA 4, 0x021b4834, 0x00000000
DATA 4, 0x021b4838, 0xf3333333

DATA 4, 0x021b08b8, 0x00000800
DATA 4, 0x021b48b8, 0x00000800

DATA 4, 0x021b0004, 0x00020036
DATA 4, 0x021b0008, 0x00000000
DATA 4, 0x021b000c, 0x33374133

DATA 4, 0x021b0010, 0x00100a82

DATA 4, 0x021b0014, 0x00000093

DATA 4, 0x021b0018, 0x0000174C
DATA 4, 0x021b001c, 0x00008050
DATA 4, 0x021b002c, 0x0f9f26d2
DATA 4, 0x021b0030, 0x009F0E10
DATA 4, 0x021b0038, 0x00190778

#ifdef CONFIG_INTERLEAVING_MODE
DATA 4, 0x021b0040, 0x00000053
#else
DATA 4, 0x021b0040, 0x0000004f
#endif

DATA 4, 0x021b0000, 0xc3110000

DATA 4, 0x021b4004, 0x00020036
DATA 4, 0x021b4008, 0x00000000

DATA 4, 0x021b400c, 0x33374133

DATA 4, 0x021b4010, 0x00100a82

DATA 4, 0x021b4014, 0x00000093

DATA 4, 0x021b4018, 0x0000174C
DATA 4, 0x021b401c, 0x00008050

DATA 4, 0x021b402c, 0x0f9f26d2

DATA 4, 0x021b4030, 0x009F0E10

DATA 4, 0x021b4038, 0x00190778

#ifdef CONFIG_INTERLEAVING_MODE
DATA 4, 0x021b4040, 0x00000013
#else
DATA 4, 0x021b4040, 0x00000017
#endif

DATA 4, 0x021b4000, 0xc3110000

/* Channel 0 */
/* CS0 */
DATA 4, 0x021b001c, 0x003f8030
DATA 4, 0x021b001c, 0xff0a8030
DATA 4, 0x021b001c, 0x82018030
DATA 4, 0x021b001c, 0x04028030
DATA 4, 0x021b001c, 0x04038030
DATA 4, 0x021b001c, 0x01038030
/* CS1 */
DATA 4, 0x021b001c, 0x003f8038
DATA 4, 0x021b001c, 0xff0a8038
DATA 4, 0x021b001c, 0x82018038
DATA 4, 0x021b001c, 0x04028038
DATA 4, 0x021b001c, 0x04038038
DATA 4, 0x021b001c, 0x01038038

/* Channel 1 */
/* CS0 */
DATA 4, 0x021b401c, 0x003f8030
DATA 4, 0x021b401c, 0xff0a8030
DATA 4, 0x021b401c, 0x82018030
DATA 4, 0x021b401c, 0x04028030
DATA 4, 0x021b401c, 0x04038030
DATA 4, 0x021b401c, 0x01038030
/* CS1 */
DATA 4, 0x021b401c, 0x003f8038
DATA 4, 0x021b401c, 0xff0a8038
DATA 4, 0x021b401c, 0x82018038
DATA 4, 0x021b401c, 0x04028038
DATA 4, 0x021b401c, 0x04038038
DATA 4, 0x021b401c, 0x01038038
DATA 4, 0x021b4800, 0xa1390003

DATA 4, 0x021b0020, 0x00001800
DATA 4, 0x021b4020, 0x00001800

DATA 4, 0x021b0818, 0x00000000
DATA 4, 0x021b4818, 0x00000000

DATA 4, 0x021b0004, 0x00025576
DATA 4, 0x021b4004, 0x00025576

DATA 4, 0x021b0404, 0x00011006
DATA 4, 0x021b4404, 0x00011006

DATA 4, 0x021b001c, 0x00000000
DATA 4, 0x021b401c, 0x00000000

/* enable clocks */
DATA 4, 0x020c4068, 0x00C03F3F
DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFC000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0x00FFF300
DATA 4, 0x020c407c, 0x0F0000C3
DATA 4, 0x020c4080, 0x000003FF

/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, 0x020e0010, 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4, 0x020e0018, 0x007F007F
DATA 4, 0x020e001c, 0x007F007F

#else
/* DCD */
/* DDR clock to 400MHz */
DATA 4, 0x020C4018 0x00060324
/* AHB_ROOT_CLK change divide ratio from 4 to 3 for ENET */
DATA 4, 0x020C4014 0x00018900

/* DSE to 80 ohms, 100K PD on DQS */
DATA 4 0x020e0798 0x00080000
DATA 4 0x020e0758 0x00000000



DATA 4, 0x020E0588, 0x00000030
DATA 4, 0x020E0594, 0x00000030

DATA 4, 0x020E056c, 0x00000030
DATA 4, 0x020E0578, 0x00000030
DATA 4, 0x020E074c, 0x00000030

DATA 4, 0x020E057c, 0x00000030
DATA 4, 0x020E058c, 0x00000000
DATA 4, 0x020E059c, 0x00000030
DATA 4, 0x020E05a0, 0x00000030
DATA 4, 0x020E078c, 0x00000030

DATA 4, 0x020E0750, 0x00020000
DATA 4, 0x020E05a8, 0x00003030
DATA 4, 0x020E05b0, 0x00003030
DATA 4, 0x020E0524, 0x00003030
DATA 4, 0x020E051c, 0x00003030
DATA 4, 0x020E0518, 0x00003030
DATA 4, 0x020E050c, 0x00003030
DATA 4, 0x020E05b8, 0x00003030
DATA 4, 0x020E05c0, 0x00003030

DATA 4, 0x020E0774, 0x00020000

DATA 4, 0x020E0784, 0x00000030
DATA 4, 0x020E0788, 0x00000030
DATA 4, 0x020E0794, 0x00000030
DATA 4, 0x020E079c, 0x00000030
DATA 4, 0x020E07a0, 0x00000030
DATA 4, 0x020E07a4, 0x00000030
DATA 4, 0x020E07a8, 0x00000030
DATA 4, 0x020E0748, 0x00000030

DATA 4, 0x020E05ac, 0x00000030
DATA 4, 0x020E05b4, 0x00000030
DATA 4, 0x020E0528, 0x00000030
DATA 4, 0x020E0520, 0x00000030
DATA 4, 0x020E0514, 0x00000030
DATA 4, 0x020E0510, 0x00000030
DATA 4, 0x020E05bc, 0x00000030
DATA 4, 0x020E05c4, 0x00000030



DATA 4, 0x020E0590, 0x00000020
DATA 4, 0x020E0598, 0x00000020


/* DDR setup */
DATA 4, 0x021b001c, 0x00008000
DATA 4, 0x021b401c, 0x00008000

/*SCM CONF*/

DATA 4, 0x021b085c, 0x1b4700c7
DATA 4, 0x021b485c, 0x1b4700c7

DATA 4, 0x021b0800, 0xa1390003

/* calibration required */
DATA 4, 0x021b0890, 0x00400000
DATA 4, 0x021b4890, 0x00400000

/* calibration required */
/*SCM CONF*/

DATA 4, 0x021b0848, 0x44404044
DATA 4, 0x021b4848, 0x44443A46

DATA 4, 0x021b0850, 0x34343A38
DATA 4, 0x021b4850, 0x3E2E483C

DATA 4, 0x021b083c, 0x20000000
DATA 4, 0x021b0840, 0x00000000
DATA 4, 0x021b483c, 0x20000000
DATA 4, 0x021b4840, 0x00000000

DATA 4, 0x021b081c, 0x33333333
DATA 4, 0x021b0820, 0x33333333
DATA 4, 0x021b0824, 0x33333333
DATA 4, 0x021b0828, 0x33333333
DATA 4, 0x021b481c, 0x33333333
DATA 4, 0x021b4820, 0x33333333
DATA 4, 0x021b4824, 0x33333333
DATA 4, 0x021b4828, 0x33333333
DATA 4, 0x021b082c, 0xf3333333
DATA 4, 0x021b0830, 0xf3333333
DATA 4, 0x021b0834, 0xf3333333
DATA 4, 0x021b0838, 0xf3333333
DATA 4, 0x021b482c, 0xf3333333
DATA 4, 0x021b4830, 0xf3333333
DATA 4, 0x021b4834, 0xf3333333
DATA 4, 0x021b4838, 0xf3333333

DATA 4, 0x021b08b8, 0x00000800
DATA 4, 0x021b48b8, 0x00000800

DATA 4, 0x021b0004, 0x00020036
DATA 4, 0x021b0008, 0x00000000
DATA 4, 0x021b000c, 0x33374133

DATA 4, 0x021b0010, 0x00100a82

DATA 4, 0x021b0014, 0x00000093

DATA 4, 0x021b0018, 0x0000174C
DATA 4, 0x021b001c, 0x00008050
DATA 4, 0x021b002c, 0x0f9f26d2
DATA 4, 0x021b0030, 0x00000010
DATA 4, 0x021b0038, 0x00190778
#ifdef CONFIG_INTERLEAVING_MODE
DATA 4, 0x021b0040, 0x00000053
#else
DATA 4, 0x021b0040, 0x0000004f
#endif

DATA 4, 0x021b0000, 0x83110000

DATA 4, 0x021b4008, 0x00000000

DATA 4, 0x021b400c, 0x33374133
DATA 4, 0x021b4004, 0x00020036
DATA 4, 0x021b4010, 0x00100a82

DATA 4, 0x021b4014, 0x00000093

DATA 4, 0x021b4018, 0x0000174C
DATA 4, 0x021b401c, 0x00008050

DATA 4, 0x021b402c, 0x0f9f26d2

DATA 4, 0x021b4030, 0x00000010

DATA 4, 0x021b4038, 0x00190778
#ifdef CONFIG_INTERLEAVING_MODE
DATA 4, 0x021b4040, 0x00000013
#else
DATA 4, 0x021b4040, 0x00000017
#endif

DATA 4, 0x021b4000, 0x83110000

/* Channel 0 */
DATA 4, 0x021b001c, 0x003f8030
DATA 4, 0x021b001c, 0xff0a8030
DATA 4, 0x021b001c, 0x82018030
DATA 4, 0x021b001c, 0x04028030
DATA 4, 0x021b001c, 0x04038030

/* Channel 1 */
DATA 4, 0x021b401c, 0x003f8030
DATA 4, 0x021b401c, 0xff0a8030
DATA 4, 0x021b401c, 0x82018030
DATA 4, 0x021b401c, 0x04028030
DATA 4, 0x021b401c, 0x04038030

DATA 4, 0x021b0800, 0xa1390003

DATA 4, 0x021b0020, 0x00001800
DATA 4, 0x021b4020, 0x00001800

DATA 4, 0x021b0818, 0x00000000
DATA 4, 0x021b4818, 0x00000000

DATA 4, 0x021b0004, 0x00025576
DATA 4, 0x021b4004, 0x00025576

DATA 4, 0x021b0404, 0x00011006
DATA 4, 0x021b4404, 0x00011006

DATA 4, 0x021b001c, 0x00000000
DATA 4, 0x021b401c, 0x00000000

/* enable clocks */
DATA 4, 0x020c4068, 0x00C03F3F
DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFC000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0x00FFF300
DATA 4, 0x020c407c, 0x0F0000C3
DATA 4, 0x020c4080, 0x000003FF

/* enable AXI cache for VDOA/VPU/IPU */
DATA 4, 0x020e0010, 0xF00000CF
/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
DATA 4, 0x020e0018, 0x007F007F
DATA 4, 0x020e001c, 0x007F007F
#endif /*CONFIG_SCM_LPDDR2_2GB*/
#endif