1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
|
/*
* Freescale MX23EVK Boot setup
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
* on behalf of DENX Software Engineering GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx23.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#define MUX_CONFIG_SSP1 (MXS_PAD_8MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
#define MUX_CONFIG_LCD (MXS_PAD_4MA | MXS_PAD_NOPULL)
const iomux_cfg_t iomux_setup[] = {
/* DUART */
MX23_PAD_PWM0__DUART_RX,
MX23_PAD_PWM1__DUART_TX,
/* EMI */
MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
/* MMC 0 */
MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP1,
MX23_PAD_SSP1_DATA1__SSP1_DATA1 | MUX_CONFIG_SSP1,
MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP1,
MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP1,
MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP1,
MX23_PAD_SSP1_DETECT__SSP1_DETECT | MUX_CONFIG_SSP1,
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
MX23_PAD_SSP1_SCK__SSP1_SCK |
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
/* Write Protect Pin */
MX23_PAD_PWM4__GPIO_1_30 |
(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
/* Slot Power Enable */
MX23_PAD_PWM3__GPIO_1_29 |
(MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
/* LCD */
MX23_PAD_LCD_D00__LCD_D00 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D01__LCD_D01 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D02__LCD_D02 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D03__LCD_D03 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D04__LCD_D04 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D05__LCD_D05 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D06__LCD_D06 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D07__LCD_D07 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D08__LCD_D08 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D09__LCD_D09 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD,
MX23_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D08__LCD_D18 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D09__LCD_D19 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D10__LCD_D20 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D11__LCD_D21 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D12__LCD_D22 | MUX_CONFIG_LCD,
MX23_PAD_GPMI_D13__LCD_D23 | MUX_CONFIG_LCD,
MX23_PAD_LCD_DOTCK__LCD_DOTCK | MUX_CONFIG_LCD,
MX23_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD,
MX23_PAD_LCD_HSYNC__LCD_HSYNC | MUX_CONFIG_LCD,
MX23_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD,
MX23_PAD_LCD_RESET__GPIO_1_18 | MUX_CONFIG_LCD, /* LCD power */
MX23_PAD_PWM2__GPIO_1_28 | MUX_CONFIG_LCD, /* LCD contrast */
};
#define HW_DRAM_CTL14 (0x38 >> 2)
#define CS_MAP 0x3
#define INTAREF 0x2
#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP)
void mxs_adjust_memory_params(uint32_t *dram_vals)
{
dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG;
}
void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
|
