1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
|
/*
* (C) Copyright 2006
* Detlev Zundel, DENX Software Engineering, dzu@denx.de
*
* (C) Copyright -2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2001
* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/* this section was ripped out of arch/powerpc/syslib/mpc52xx_pic.c in the
* Linux 2.6 source with the following copyright.
*
* Based on (well, mostly copied from) the code from the 2.4 kernel by
* Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
*
* Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
* Copyright (C) 2003 Montavista Software, Inc
*/
#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <command.h>
struct irq_action {
interrupt_handler_t *handler;
void *arg;
ulong count;
};
static struct irq_action irq_handlers[NR_IRQS];
static struct mpc5xxx_intr *intr;
static struct mpc5xxx_sdma *sdma;
static void mpc5xxx_ic_disable(unsigned int irq)
{
u32 val;
if (irq == MPC5XXX_IRQ0) {
val = in_be32(&intr->ctrl);
val &= ~(1 << 11);
out_be32(&intr->ctrl, val);
} else if (irq < MPC5XXX_IRQ1) {
BUG();
} else if (irq <= MPC5XXX_IRQ3) {
val = in_be32(&intr->ctrl);
val &= ~(1 << (10 - (irq - MPC5XXX_IRQ1)));
out_be32(&intr->ctrl, val);
} else if (irq < MPC5XXX_SDMA_IRQ_BASE) {
val = in_be32(&intr->main_mask);
val |= 1 << (16 - (irq - MPC5XXX_MAIN_IRQ_BASE));
out_be32(&intr->main_mask, val);
} else if (irq < MPC5XXX_PERP_IRQ_BASE) {
val = in_be32(&sdma->IntMask);
val |= 1 << (irq - MPC5XXX_SDMA_IRQ_BASE);
out_be32(&sdma->IntMask, val);
} else {
val = in_be32(&intr->per_mask);
val |= 1 << (31 - (irq - MPC5XXX_PERP_IRQ_BASE));
out_be32(&intr->per_mask, val);
}
}
static void mpc5xxx_ic_enable(unsigned int irq)
{
u32 val;
if (irq == MPC5XXX_IRQ0) {
val = in_be32(&intr->ctrl);
val |= 1 << 11;
out_be32(&intr->ctrl, val);
} else if (irq < MPC5XXX_IRQ1) {
BUG();
} else if (irq <= MPC5XXX_IRQ3) {
val = in_be32(&intr->ctrl);
val |= 1 << (10 - (irq - MPC5XXX_IRQ1));
out_be32(&intr->ctrl, val);
} else if (irq < MPC5XXX_SDMA_IRQ_BASE) {
val = in_be32(&intr->main_mask);
val &= ~(1 << (16 - (irq - MPC5XXX_MAIN_IRQ_BASE)));
out_be32(&intr->main_mask, val);
} else if (irq < MPC5XXX_PERP_IRQ_BASE) {
val = in_be32(&sdma->IntMask);
val &= ~(1 << (irq - MPC5XXX_SDMA_IRQ_BASE));
out_be32(&sdma->IntMask, val);
} else {
val = in_be32(&intr->per_mask);
val &= ~(1 << (31 - (irq - MPC5XXX_PERP_IRQ_BASE)));
out_be32(&intr->per_mask, val);
}
}
static void mpc5xxx_ic_ack(unsigned int irq)
{
u32 val;
/*
* Only some irqs are reset here, others in interrupting hardware.
*/
switch (irq) {
case MPC5XXX_IRQ0:
val = in_be32(&intr->ctrl);
val |= 0x08000000;
out_be32(&intr->ctrl, val);
break;
case MPC5XXX_CCS_IRQ:
val = in_be32(&intr->enc_status);
val |= 0x00000400;
out_be32(&intr->enc_status, val);
break;
case MPC5XXX_IRQ1:
val = in_be32(&intr->ctrl);
val |= 0x04000000;
out_be32(&intr->ctrl, val);
break;
case MPC5XXX_IRQ2:
val = in_be32(&intr->ctrl);
val |= 0x02000000;
out_be32(&intr->ctrl, val);
break;
case MPC5XXX_IRQ3:
val = in_be32(&intr->ctrl);
val |= 0x01000000;
out_be32(&intr->ctrl, val);
break;
default:
if (irq >= MPC5XXX_SDMA_IRQ_BASE
&& irq < (MPC5XXX_SDMA_IRQ_BASE + MPC5XXX_SDMA_IRQ_NUM)) {
out_be32(&sdma->IntPend,
1 << (irq - MPC5XXX_SDMA_IRQ_BASE));
}
break;
}
}
static void mpc5xxx_ic_disable_and_ack(unsigned int irq)
{
mpc5xxx_ic_disable(irq);
mpc5xxx_ic_ack(irq);
}
static void mpc5xxx_ic_end(unsigned int irq)
{
mpc5xxx_ic_enable(irq);
}
void mpc5xxx_init_irq(void)
{
u32 intr_ctrl;
/* Remap the necessary zones */
intr = (struct mpc5xxx_intr *)(MPC5XXX_ICTL);
sdma = (struct mpc5xxx_sdma *)(MPC5XXX_SDMA);
/* Disable all interrupt sources. */
out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
intr_ctrl = in_be32(&intr->ctrl);
intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */
0x00ff0000 | /* IRQ 0-3 level sensitive low active */
0x00001000 | /* MEE master external enable */
0x00000000 | /* 0 means disable IRQ 0-3 */
0x00000001; /* CEb route critical normally */
out_be32(&intr->ctrl, intr_ctrl);
/* Zero a bunch of the priority settings. */
out_be32(&intr->per_pri1, 0);
out_be32(&intr->per_pri2, 0);
out_be32(&intr->per_pri3, 0);
out_be32(&intr->main_pri1, 0);
out_be32(&intr->main_pri2, 0);
}
int mpc5xxx_get_irq(struct pt_regs *regs)
{
u32 status;
int irq = -1;
status = in_be32(&intr->enc_status);
if (status & 0x00000400) { /* critical */
irq = (status >> 8) & 0x3;
if (irq == 2) /* high priority peripheral */
goto peripheral;
irq += MPC5XXX_CRIT_IRQ_BASE;
} else if (status & 0x00200000) { /* main */
irq = (status >> 16) & 0x1f;
if (irq == 4) /* low priority peripheral */
goto peripheral;
irq += MPC5XXX_MAIN_IRQ_BASE;
} else if (status & 0x20000000) { /* peripheral */
peripheral:
irq = (status >> 24) & 0x1f;
if (irq == 0) { /* bestcomm */
status = in_be32(&sdma->IntPend);
irq = ffs(status) + MPC5XXX_SDMA_IRQ_BASE - 1;
} else
irq += MPC5XXX_PERP_IRQ_BASE;
}
return irq;
}
/****************************************************************************/
int interrupt_init_cpu(ulong * decrementer_count)
{
*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
mpc5xxx_init_irq();
return (0);
}
/****************************************************************************/
/*
* Handle external interrupts
*/
void external_interrupt(struct pt_regs *regs)
{
int irq, unmask = 1;
irq = mpc5xxx_get_irq(regs);
mpc5xxx_ic_disable_and_ack(irq);
enable_interrupts();
if (irq_handlers[irq].handler != NULL)
(*irq_handlers[irq].handler) (irq_handlers[irq].arg);
else {
printf("\nBogus External Interrupt IRQ %d\n", irq);
/*
* turn off the bogus interrupt, otherwise it
* might repeat forever
*/
unmask = 0;
}
if (unmask)
mpc5xxx_ic_end(irq);
}
void timer_interrupt_cpu(struct pt_regs *regs)
{
/* nothing to do here */
return;
}
/****************************************************************************/
/*
* Install and free a interrupt handler.
*/
void irq_install_handler(int irq, interrupt_handler_t * handler, void *arg)
{
if (irq < 0 || irq >= NR_IRQS) {
printf("irq_install_handler: bad irq number %d\n", irq);
return;
}
if (irq_handlers[irq].handler != NULL)
printf("irq_install_handler: 0x%08lx replacing 0x%08lx\n",
(ulong) handler, (ulong) irq_handlers[irq].handler);
irq_handlers[irq].handler = handler;
irq_handlers[irq].arg = arg;
mpc5xxx_ic_enable(irq);
}
void irq_free_handler(int irq)
{
if (irq < 0 || irq >= NR_IRQS) {
printf("irq_free_handler: bad irq number %d\n", irq);
return;
}
mpc5xxx_ic_disable(irq);
irq_handlers[irq].handler = NULL;
irq_handlers[irq].arg = NULL;
}
/****************************************************************************/
#if defined(CONFIG_CMD_IRQ)
void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
{
int irq, re_enable;
u32 intr_ctrl;
char *irq_config[] = { "level sensitive, active high",
"edge sensitive, rising active edge",
"edge sensitive, falling active edge",
"level sensitive, active low"
};
re_enable = disable_interrupts();
intr_ctrl = in_be32(&intr->ctrl);
printf("Interrupt configuration:\n");
for (irq = 0; irq <= 3; irq++) {
printf("IRQ%d: %s\n", irq,
irq_config[(intr_ctrl >> (22 - 2 * irq)) & 0x3]);
}
puts("\nInterrupt-Information:\n" "Nr Routine Arg Count\n");
for (irq = 0; irq < NR_IRQS; irq++)
if (irq_handlers[irq].handler != NULL)
printf("%02d %08lx %08lx %ld\n", irq,
(ulong) irq_handlers[irq].handler,
(ulong) irq_handlers[irq].arg,
irq_handlers[irq].count);
if (re_enable)
enable_interrupts();
}
#endif
|