summaryrefslogtreecommitdiff
path: root/arch/microblaze/cpu/timer.c
blob: c0fc7c0f3ca189cabfd2ff378a824d40e71cdd3a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
/*
 * (C) Copyright 2007 Michal Simek
 *
 * Michal  SIMEK <monstr@monstr.eu>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <fdtdec.h>
#include <asm/microblaze_timer.h>
#include <asm/microblaze_intc.h>

DECLARE_GLOBAL_DATA_PTR;

volatile int timestamp = 0;
microblaze_timer_t *tmr;

ulong get_timer (ulong base)
{
	if (tmr)
		return timestamp - base;
	return timestamp++ - base;
}

void __udelay(unsigned long usec)
{
	u32 i;

	if (tmr) {
		i = get_timer(0);
		while ((get_timer(0) - i) < (usec / 1000))
			;
	} else {
#ifndef CONFIG_OF_CONTROL
		for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
			;
#endif
	}
}

#ifndef CONFIG_SPL_BUILD
static void timer_isr(void *arg)
{
	timestamp++;
	tmr->control = tmr->control | TIMER_INTERRUPT;
}

int timer_init (void)
{
	int irq = -1;
	u32 preload = 0;
	u32 ret = 0;

#ifdef CONFIG_OF_CONTROL
	const void *blob = gd->fdt_blob;
	int node = 0;
	u32 cell[2];

	debug("TIMER: Initialization\n");

	node = fdt_node_offset_by_compatible(blob, node,
				"xlnx,xps-timer-1.00.a");
	if (node != -1) {
		fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
		if (base == FDT_ADDR_T_NONE)
			return -1;

		debug("TIMER: Base addr %lx\n", base);
		tmr = (microblaze_timer_t *)base;

		ret = fdtdec_get_int_array(blob, node, "interrupts",
					    cell, ARRAY_SIZE(cell));
		if (ret)
			return ret;

		irq = cell[0];
		debug("TIMER: IRQ %x\n", irq);

		preload = fdtdec_get_int(blob, node, "clock-frequency", 0);
		preload /= CONFIG_SYS_HZ;
	} else {
		return node;
	}

#else
#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
	preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
	irq = CONFIG_SYS_TIMER_0_IRQ;
	tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
#endif
#endif
	if (tmr && preload && irq >= 0) {
		tmr->loadreg = preload;
		tmr->control = TIMER_INTERRUPT | TIMER_RESET;
		tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
					TIMER_RELOAD | TIMER_DOWN_COUNT;
		timestamp = 0;
		ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
		if (ret)
			tmr = NULL;
	}
	/* No problem if timer is not found/initialized */
	return 0;
}
#else
int timer_init(void)
{
	return 0;
}
#endif

/*
 * This function is derived from PowerPC code (read timebase as long long).
 * On Microblaze it just returns the timer value.
 */
unsigned long long get_ticks(void)
{
	return get_timer(0);
}

/*
 * This function is derived from PowerPC code (timebase clock frequency).
 * On Microblaze it returns the number of timer ticks per second.
 */
ulong get_tbclk(void)
{
	return CONFIG_SYS_HZ;
}