blob: 3960bbb08a84a3003255972937bbaf05e1e24d1b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
|
/*
* (C) Copyright 2007 Michal Simek
*
* Michal SIMEK <monstr@monstr.eu>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/microblaze_timer.h>
#include <asm/microblaze_intc.h>
volatile int timestamp = 0;
microblaze_timer_t *tmr;
ulong get_timer (ulong base)
{
if (tmr)
return timestamp - base;
return timestamp++ - base;
}
void __udelay(unsigned long usec)
{
u32 i;
if (tmr) {
i = get_timer(0);
while ((get_timer(0) - i) < (usec / 1000))
;
} else {
for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
;
}
}
#ifndef CONFIG_SPL_BUILD
static void timer_isr(void *arg)
{
timestamp++;
tmr->control = tmr->control | TIMER_INTERRUPT;
}
int timer_init (void)
{
int irq = -1;
u32 preload = 0;
u32 ret = 0;
#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
irq = CONFIG_SYS_TIMER_0_IRQ;
tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
#endif
if (tmr && preload && irq >= 0) {
tmr->loadreg = preload;
tmr->control = TIMER_INTERRUPT | TIMER_RESET;
tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
TIMER_RELOAD | TIMER_DOWN_COUNT;
timestamp = 0;
ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
if (ret)
tmr = NULL;
}
/* No problem if timer is not found/initialized */
return 0;
}
#else
int timer_init(void)
{
return 0;
}
#endif
/*
* This function is derived from PowerPC code (read timebase as long long).
* On Microblaze it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On Microblaze it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
|
