blob: f97f3dd1496aa54f7ca0667d0ebea299c95d50e7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Alex Zuepke <azu@sysgo.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _U_BOOT_ARM_H_
#define _U_BOOT_ARM_H_ 1
/* for the following variables, see start.S */
extern ulong IRQ_STACK_START; /* top of IRQ stack */
extern ulong FIQ_STACK_START; /* top of FIQ stack */
extern ulong _datarel_start_ofs;
extern ulong _datarelrolocal_start_ofs;
extern ulong _datarellocal_start_ofs;
extern ulong _datarelro_start_ofs;
extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */
/* cpu/.../cpu.c */
int cpu_init(void);
int cleanup_before_linux(void);
/* Set up ARMv7 MMU, caches and TLBs */
void cpu_init_cp15(void);
/* cpu/.../arch/cpu.c */
int arch_cpu_init(void);
int arch_misc_init(void);
int arch_early_init_r(void);
/* board/.../... */
int board_init(void);
int dram_init (void);
void dram_init_banksize (void);
/* cpu/.../interrupt.c */
int arch_interrupt_init (void);
void reset_timer_masked (void);
ulong get_timer_masked (void);
void udelay_masked (unsigned long usec);
/* calls to c from vectors.S */
void bad_mode(void);
void do_undefined_instruction(struct pt_regs *pt_regs);
void do_software_interrupt(struct pt_regs *pt_regs);
void do_prefetch_abort(struct pt_regs *pt_regs);
void do_data_abort(struct pt_regs *pt_regs);
void do_not_used(struct pt_regs *pt_regs);
#ifdef CONFIG_ARM64
void do_fiq(struct pt_regs *pt_regs, unsigned int esr);
void do_irq(struct pt_regs *pt_regs, unsigned int esr);
#else
void do_fiq(struct pt_regs *pt_regs);
void do_irq(struct pt_regs *pt_regswq);
#endif
#endif /* _U_BOOT_ARM_H_ */
|