summaryrefslogtreecommitdiff
path: root/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
blob: ccadd817c064f498bd04c64c71c9dd4c452b8eca (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
/*
 * Device Tree Source for UniPhier PH1-LD6b Reference Board
 *
 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;
/include/ "uniphier-ph1-ld6b.dtsi"
/include/ "uniphier-ref-daughter.dtsi"

/ {
	model = "UniPhier PH1-LD6b Reference Board";
	compatible = "socionext,ph1-ld6b-ref", "socionext,ph1-ld6b";

	memory {
		device_type = "memory";
		reg = <0x80000000 0x80000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
		stdout-path = &serial0;
	};

	aliases {
		serial0 = &serial0;
		serial1 = &serial1;
		serial2 = &serial2;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
	};
};

&serial0 {
	status = "okay";
};

&serial1 {
	status = "okay";
};

&serial2 {
	status = "okay";
};

&i2c0 {
	status = "okay";
};

&usb0 {
	status = "okay";
};

&usb1 {
	status = "okay";
};

/* for U-boot only */
/ {
	soc {
		u-boot,dm-pre-reloc;
	};
};

&serial0 {
	u-boot,dm-pre-reloc;
};

&pinctrl {
	u-boot,dm-pre-reloc;
};

&pinctrl_uart0 {
	u-boot,dm-pre-reloc;
};