summaryrefslogtreecommitdiff
path: root/arch/arm/dts/exynos54xx.dtsi
blob: 7892345e2ee277ce0da18476ad3077c494458478 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
/*
 * (C) Copyright 2013 SAMSUNG Electronics
 * SAMSUNG EXYNOS5420 SoC device tree source
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include "exynos5.dtsi"

/ {
	config {
		machine-arch-id = <4151>;
	};

	aliases {
		i2c0 = "/i2c@12c60000";
		i2c1 = "/i2c@12c70000";
		i2c2 = "/i2c@12c80000";
		i2c3 = "/i2c@12c90000";
		i2c4 = "/i2c@12ca0000";
		i2c5 = "/i2c@12cb0000";
		i2c6 = "/i2c@12cc0000";
		i2c7 = "/i2c@12cd0000";
		i2c8 = "/i2c@12e00000";
		i2c9 = "/i2c@12e10000";
		i2c10 = "/i2c@12e20000";
		spi0 = "/spi@12d20000";
		spi1 = "/spi@12d30000";
		spi2 = "/spi@12d40000";
		spi3 = "/spi@131a0000";
		spi4 = "/spi@131b0000";
		mmc0 = "/mmc@12200000";
		mmc1 = "/mmc@12210000";
		mmc2 = "/mmc@12220000";
		xhci0 = "/xhci@12000000";
		xhci1 = "/xhci@12400000";
	};

	i2c@12ca0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12CA0000 0x100>;
		interrupts = <0 60 0>;
	};

	i2c@12cb0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12CB0000 0x100>;
		interrupts = <0 61 0>;
	};

	i2c@12cc0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12CC0000 0x100>;
		interrupts = <0 62 0>;
	};

	i2c@12cd0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12CD0000 0x100>;
		interrupts = <0 63 0>;
	};

	i2c@12e00000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12E00000 0x100>;
		interrupts = <0 87 0>;
	};

	i2c@12e10000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12E10000 0x100>;
		interrupts = <0 88 0>;
	};

	i2c@12e20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos5-hsi2c";
		reg = <0x12E20000 0x100>;
		interrupts = <0 203 0>;
	};

	mmc@12200000 {
		samsung,bus-width = <8>;
		samsung,timing = <1 3 3>;
		samsung,removable = <0>;
		samsung,pre-init;
	};

	mmc@12210000 {
		status = "disabled";
	};

	mmc@12220000 {
		samsung,bus-width = <4>;
		samsung,timing = <1 2 3>;
		samsung,removable = <1>;
	};

	mmc@12230000 {
		status = "disabled";
	};

	fimdm0_sysmmu@0x14640000 {
		compatible = "samsung,sysmmu-v3.3";
		reg = <0x14640000 0x100>;
	};

	fimdm1_sysmmu@0x14680000 {
		compatible = "samsung,sysmmu-v3.3";
		reg = <0x14680000 0x100>;
	};

	fimd@14400000 {
		/* sysmmu is not used in U-Boot */
		samsung,disable-sysmmu;
	};

	dp@145b0000 {
		samsung,lt-status = <0>;

		samsung,master-mode = <0>;
		samsung,bist-mode = <0>;
		samsung,bist-pattern = <0>;
		samsung,h-sync-polarity = <0>;
		samsung,v-sync-polarity = <0>;
		samsung,interlaced = <0>;
		samsung,color-space = <0>;
		samsung,dynamic-range = <0>;
		samsung,ycbcr-coeff = <0>;
		samsung,color-depth = <1>;
	};

	dmc {
		mem-type = "ddr3";
	};

	xhci1: xhci@12400000 {
		compatible = "samsung,exynos5250-xhci";
		reg = <0x12400000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos5250-usb3-phy";
			reg = <0x12500000 0x100>;
		};
	};
};