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/*
* SAMSUNG/GOOGLE Peach-Pit board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "exynos54xx.dtsi"
/ {
model = "Samsung/Google Peach Pit board based on Exynos5420";
compatible = "google,pit-rev#", "google,pit",
"google,peach", "samsung,exynos5420", "samsung,exynos5";
config {
google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
hwid = "PIT TEST A-A 7848";
lazy-init = <1>;
};
aliases {
serial0 = "/serial@12C30000";
console = "/serial@12C30000";
pmic = "/i2c@12ca0000";
};
dmc {
mem-manuf = "samsung";
mem-type = "ddr3";
clock-frequency = <800000000>;
arm-frequency = <900000000>;
};
tmu@10060000 {
samsung,min-temp = <25>;
samsung,max-temp = <125>;
samsung,start-warning = <95>;
samsung,start-tripping = <105>;
samsung,hw-tripping = <110>;
samsung,efuse-min-value = <40>;
samsung,efuse-value = <55>;
samsung,efuse-max-value = <100>;
samsung,slope = <274761730>;
samsung,dc-value = <25>;
};
/* MAX77802 is on i2c bus 4 */
i2c@12ca0000 {
clock-frequency = <400000>;
power-regulator@9 {
compatible = "maxim,max77802-pmic";
reg = <0x9>;
};
};
i2c@12cd0000 { /* i2c7 */
clock-frequency = <100000>;
soundcodec@20 {
reg = <0x20>;
compatible = "maxim,max98090-codec";
};
edp-lvds-bridge@48 {
compatible = "parade,ps8625";
reg = <0x48>;
sleep-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpy7 7 GPIO_ACTIVE_HIGH>;
};
};
sound@3830000 {
samsung,codec-type = "max98090";
};
i2c@12e10000 { /* i2c9 */
clock-frequency = <400000>;
tpm@20 {
compatible = "infineon,slb9645-tpm";
reg = <0x20>;
};
};
spi@12d30000 { /* spi1 */
spi-max-frequency = <50000000>;
firmware_storage_spi: flash@0 {
compatible = "spi-flash";
reg = <0>;
/*
* A region for the kernel to store a panic event
* which the firmware will add to the log.
*/
elog-panic-event-offset = <0x01e00000 0x100000>;
elog-shrink-size = <0x400>;
elog-full-threshold = <0xc00>;
};
};
spi@12d40000 { /* spi2 */
spi-max-frequency = <4000000>;
spi-deactivate-delay = <200>;
cros_ec: cros-ec@0 {
reg = <0>;
compatible = "google,cros-ec";
spi-half-duplex;
spi-max-timeout-ms = <1100>;
spi-frame-header = <0xec>;
ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>;
/*
* This describes the flash memory within the EC. Note
* that the STM32L flash erases to 0, not 0xff.
*/
#address-cells = <1>;
#size-cells = <1>;
flash@8000000 {
reg = <0x08000000 0x20000>;
erase-value = <0>;
};
};
};
xhci@12000000 {
samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>;
};
xhci@12400000 {
samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>;
};
fimd@14400000 {
samsung,vl-freq = <60>;
samsung,vl-col = <1366>;
samsung,vl-row = <768>;
samsung,vl-width = <1366>;
samsung,vl-height = <768>;
samsung,vl-clkp;
samsung,vl-dp;
samsung,vl-bpix = <4>;
samsung,vl-hspw = <32>;
samsung,vl-hbpd = <40>;
samsung,vl-hfpd = <40>;
samsung,vl-vspw = <6>;
samsung,vl-vbpd = <10>;
samsung,vl-vfpd = <12>;
samsung,vl-cmd-allow-len = <0xf>;
samsung,winid = <3>;
samsung,interface-mode = <1>;
samsung,dp-enabled = <1>;
samsung,dual-lcd-enabled = <0>;
};
};
#include "cros-ec-keyboard.dtsi"
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