1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
|
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
/* General purpose timers registers */
struct mxc_gpt {
unsigned int control;
unsigned int prescaler;
unsigned int status;
unsigned int nouse[6];
unsigned int counter;
};
static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
#define GPTCR_FRR (1<<9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
#define GPTCR_TEN (1) /* Timer enable */
static ulong timestamp;
static ulong lastinc;
int timer_init(void)
{
int i;
/* setup GP Timer 1 */
__raw_writel(GPTCR_SWR, &cur_gpt->control);
/* We have no udelay by now */
for (i = 0; i < 100; i++)
__raw_writel(0, &cur_gpt->control);
__raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
/* Freerun Mode, PERCLK1 input */
i = __raw_readl(&cur_gpt->control);
__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
reset_timer_masked();
return 0;
}
void reset_timer(void)
{
reset_timer_masked();
}
void reset_timer_masked(void)
{
ulong val = __raw_readl(&cur_gpt->counter);
lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong val = __raw_readl(&cur_gpt->counter);
val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
if (val >= lastinc)
timestamp += (val - lastinc);
else
timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ))
- lastinc) + val;
lastinc = val;
return val;
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
void set_timer(ulong t)
{
timestamp = t;
}
/* delay x useconds AND preserve advance timestamp value */
void __udelay(unsigned long usec)
{
unsigned long now, start, tmo;
tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000;
if (!tmo)
tmo = 1;
now = start = readl(&cur_gpt->counter);
while ((now - start) < tmo)
now = readl(&cur_gpt->counter);
}
|