/* * Copyright (C) 2016 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __MX6ULLEVK_CONFIG_H #define __MX6ULLEVK_CONFIG_H #include #include #include "mx6_common.h" #include #define is_mx6ull_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6ULL_9X9_EVK) #ifdef CONFIG_TARGET_MX6ULL_9X9_EVK #define PHYS_SDRAM_SIZE SZ_256M #define BOOTARGS_CMA_SIZE "cma=96M " #else #define PHYS_SDRAM_SIZE SZ_512M #define BOOTARGS_CMA_SIZE "" /* DCDC used on 14x14 EVK, no PMIC */ #undef CONFIG_LDO_BYPASS_CHECK #endif #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_FSL_USDHC_NUM 1 #else #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif #endif /* I2C configs */ #ifdef CONFIG_CMD_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_SPEED 100000 #endif /* Only use DM I2C driver for 14x14 EVK. Because the PFUZE3000 driver does not support DM */ #ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C /* PMIC only for 9X9 EVK */ #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #endif #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #ifdef CONFIG_NAND_BOOT #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) " #else #define MFG_NAND_PARTITION "" #endif #define CONFIG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ BOOTARGS_CMA_SIZE \ "rdinit=/linuxrc " \ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ "g_mass_storage.file=/fat g_mass_storage.ro=1 " \ "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ "g_mass_storage.iSerialNumber=\"\" "\ MFG_NAND_PARTITION \ "clk_ignore_unused "\ "\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffff\0" \ "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ #if defined(CONFIG_NAND_BOOT) #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ "panel=TFT43AB\0" \ "fdt_addr=0x83000000\0" \ "fdt_high=0xffffffff\0" \ "console=ttymxc0\0" \ "bootargs=console=ttymxc0,115200 ubi.mtd=4 " \ "root=ubi0:rootfs rootfstype=ubifs " \ BOOTARGS_CMA_SIZE \ "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs)\0"\ "bootcmd=nand read ${loadaddr} 0x4000000 0x800000;"\ "nand read ${fdt_addr} 0x5000000 0x100000;"\ "bootz ${loadaddr} - ${fdt_addr}\0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_file=undefined\0" \ "fdt_addr=0x83000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "panel=TFT43AB\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ BOOTARGS_CMA_SIZE \ "root=${mmcroot}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ "bootz; " \ "fi;\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ BOOTARGS_CMA_SIZE \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ "run netargs; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ "setenv get_cmd tftp; " \ "fi; " \ "${get_cmd} ${image}; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ "bootz; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi; " \ "else " \ "bootz; " \ "fi;\0" \ "findfdt="\ "if test $fdt_file = undefined; then " \ "if test $board_name = EVK && test $board_rev = 9X9; then " \ "setenv fdt_file imx6ull-9x9-evk.dtb; fi; " \ "if test $board_name = EVK && test $board_rev = 14X14; then " \ "setenv fdt_file imx6ull-14x14-evk.dtb; fi; " \ "if test $fdt_file = undefined; then " \ "echo WARNING: Could not determine dtb to use; fi; " \ "fi;\0" \ #define CONFIG_BOOTCOMMAND \ "run findfdt;" \ "mmc dev ${mmcdev};" \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ "if run loadimage; then " \ "run mmcboot; " \ "else run netboot; " \ "fi; " \ "fi; " \ "else run netboot; fi" #endif /* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 #define CONFIG_STACKSIZE SZ_128K /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #ifdef CONFIG_QSPI_BOOT #define CONFIG_ENV_IS_IN_SPI_FLASH #elif defined CONFIG_NAND_BOOT #define CONFIG_CMD_NAND #define CONFIG_ENV_IS_IN_NAND #else #define CONFIG_ENV_IS_IN_MMC #endif /* environment organization */ #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ #define CONFIG_CMD_BMODE #define CONFIG_IMX_THERMAL #define CONFIG_IOMUX_LPSR #define CONFIG_SOFT_SPI #ifdef CONFIG_FSL_QSPI #define CONFIG_SYS_FSL_QSPI_AHB #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define FSL_QSPI_FLASH_NUM 1 #define FSL_QSPI_FLASH_SIZE SZ_32M #endif #ifdef CONFIG_CMD_NAND #define CONFIG_CMD_NAND_TRIMFFS #define CONFIG_NAND_MXS #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_ONFI_DETECTION /* DMA stuff, needed for GPMI/MXS NAND support */ #define CONFIG_APBH_DMA #define CONFIG_APBH_DMA_BURST #define CONFIG_APBH_DMA_BURST8 #endif #define CONFIG_ENV_SIZE SZ_8K #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_ENV_OFFSET (13 * SZ_64K) #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) #define CONFIG_ENV_OFFSET (864 * 1024) #define CONFIG_ENV_SECT_SIZE (64 * 1024) #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED #elif defined(CONFIG_ENV_IS_IN_NAND) #undef CONFIG_ENV_SIZE #define CONFIG_ENV_OFFSET (60 << 20) #define CONFIG_ENV_SECT_SIZE (128 << 10) #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #endif /* USB Configs */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif #ifdef CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_FEC_MXC #define CONFIG_MII #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x2 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC0" #elif (CONFIG_FEC_ENET_DEV == 1) #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC1" #endif #define CONFIG_PHYLIB #define CONFIG_PHY_MICREL #define CONFIG_FEC_MXC_MDIO_BASE ENET2_BASE_ADDR #endif #ifdef CONFIG_VIDEO #define CONFIG_VIDEO_MXS #define CONFIG_VIDEO_LOGO #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_CMD_BMP #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_VIDEO_SKIP #endif #endif