/* * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. * * Configuration settings for the MX6SL Armadillo2 Freescale board. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ #ifndef __CONFIG_H #define __CONFIG_H /* High Level Configuration Options */ #define CONFIG_ARMV7 /* This is armv7 Cortex-A9 CPU core */ #define CONFIG_MXC #define CONFIG_MX6SL #define CONFIG_MX6SL_ARM2 #define CONFIG_FLASH_HEADER #define CONFIG_FLASH_HEADER_OFFSET 0x400 #define CONFIG_MX6_CLK32 32768 #include #define CONFIG_SKIP_RELOCATE_UBOOT #define CONFIG_L2_OFF /* disable L2 cache first*/ /* #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MMU */ #define CONFIG_MX6_HCLK_FREQ 24000000 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define BOARD_LATE_INIT #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SERIAL_TAG #define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024) /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* * Hardware drivers */ #define CONFIG_MXC_UART #define CONFIG_UART_BASE_ADDR UART1_IPS_BASE_ADDR /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} /*********************************************************** * Command definition ***********************************************************/ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_IMXOTP /* Enable below configure when supporting nand */ #define CONFIG_CMD_ENV #define CONFIG_REF_CLK_FREQ CONFIG_MX6_HCLK_FREQ #undef CONFIG_CMD_IMLS #define CONFIG_BOOTDELAY 3 #define CONFIG_PRIME "FEC0" #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ #define CONFIG_RD_LOADADDR (CONFIG_LOADADDR + 0x300000) #define CONFIG_BOOTARGS "console=ttymxc0,115200 "\ "rdinit=/linuxrc" #define CONFIG_BOOTCOMMAND "bootm" #define CONFIG_ENV_IS_EMBEDDED #define CONFIG_ARP_TIMEOUT 200UL /* * Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "MX6SL ARM2 IRAM U-Boot > " #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x80100000 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING /* * OCOTP Configs */ #ifdef CONFIG_CMD_IMXOTP #define CONFIG_IMX_OTP #define IMX_OTP_BASE OCOTP_BASE_ADDR #define IMX_OTP_ADDR_MAX 0x7F #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA #endif /*----------------------------------------------------------------------- * Stack sizes * * The stack sizes are set up in start.S using the settings below */ #define CONFIG_STACKSIZE (6 * 1024) /* regular stack */ /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_DDR_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) #define iomem_valid_addr(addr, size) \ (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) /*----------------------------------------------------------------------- * FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH /* Monitor at beginning of flash */ /* #define CONFIG_FSL_ENV_IN_SF */ /* #define CONFIG_FSL_ENV_IN_MMC */ #define CONFIG_ENV_SECT_SIZE (1 * 1024) #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #define CONFIG_ENV_IS_NOWHERE #endif /* __CONFIG_H */