/* * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. */ /* * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /*! * @file mxc_nd2.h * * @brief This file contains the NAND Flash Controller register information. * * * @ingroup NAND_MTD */ #ifndef __MXC_NAND_H__ #define __MXC_NAND_H__ #include #define IS_2K_PAGE_NAND ((mtd->oobblock / info->num_of_intlv) \ == NAND_PAGESIZE_2KB) #define IS_4K_PAGE_NAND ((mtd->oobblock / info->num_of_intlv) \ == NAND_PAGESIZE_4KB) #define IS_LARGE_PAGE_NAND ((mtd->oobblock / info->num_of_intlv) > 512) #define NAND_PAGESIZE_2KB 2048 #define NAND_PAGESIZE_4KB 4096 #define NAND_MAX_PAGESIZE 4096 /* * Addresses for NFC registers */ #define NFC_REG_BASE (NFC_BASE_ADDR + 0x1000) #define NFC_BUF_ADDR (NFC_REG_BASE + 0xE04) #define NFC_FLASH_ADDR (NFC_REG_BASE + 0xE06) #define NFC_FLASH_CMD (NFC_REG_BASE + 0xE08) #define NFC_CONFIG (NFC_REG_BASE + 0xE0A) #define NFC_ECC_STATUS_RESULT (NFC_REG_BASE + 0xE0C) #define NFC_SPAS (NFC_REG_BASE + 0xE10) #define NFC_WRPROT (NFC_REG_BASE + 0xE12) #define NFC_UNLOCKSTART_BLKADDR (NFC_REG_BASE + 0xE20) #define NFC_UNLOCKEND_BLKADDR (NFC_REG_BASE + 0xE22) #define NFC_CONFIG1 (NFC_REG_BASE + 0xE1A) #define NFC_CONFIG2 (NFC_REG_BASE + 0xE1C) /*! * Addresses for NFC RAM BUFFER Main area 0 */ #define MAIN_AREA0 (u16 *)(NFC_BASE_ADDR + 0x000) #define MAIN_AREA1 (u16 *)(NFC_BASE_ADDR + 0x200) /*! * Addresses for NFC SPARE BUFFER Spare area 0 */ #define SPARE_AREA0 (u16 *)(NFC_BASE_ADDR + 0x1000) #define SPARE_LEN 64 #define SPARE_COUNT 8 #define SPARE_SIZE (SPARE_LEN * SPARE_COUNT) #define SPAS_SHIFT (0) #define SPAS_MASK (0xFF00) #define IS_4BIT_ECC \ ((raw_read(REG_NFC_ECC_MODE) & NFC_ECC_MODE_4) >> 0) #define NFC_SET_SPAS(v) \ raw_write(((raw_read(REG_NFC_SPAS) & SPAS_MASK) | \ ((v<