From 8370978318337df3979aa0852529d53d77ed736e Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Wed, 4 May 2011 09:10:15 -0400 Subject: Decreases code size of the nand_spl The canyonland boards nand_spl size is just under the maximum 4KByte size. This patch decreases the size of the nand_spl to make a previous commit - commit 65a9db7be0868be91ba81b9b5bf821de82e6d9b0 - fit in the nand_spl. Signed-off-by: Alex Waterman Acked-by: Stefan Roese Signed-off-by: Scott Wood --- nand_spl/nand_boot.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) (limited to 'nand_spl') diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 4a96878..4628524 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -77,6 +77,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 { struct nand_chip *this = mtd->priv; int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT; + void (*hwctrl)(struct mtd_info *mtd, int cmd, + unsigned int ctrl) = this->cmd_ctrl; if (this->dev_ready) while (!this->dev_ready(mtd)) @@ -95,25 +97,25 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 offs >>= 1; /* Begin command latch cycle */ - this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE); /* Set ALE and clear CLE to start address cycle */ /* Column address */ - this->cmd_ctrl(mtd, offs & 0xff, + hwctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ - this->cmd_ctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ + hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - this->cmd_ctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), + hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ + hwctrl(mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE /* One more address cycle for devices > 128MiB */ - this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, + hwctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif /* Latch in address */ - this->cmd_ctrl(mtd, NAND_CMD_READSTART, + hwctrl(mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * Wait a while for the data to be ready -- cgit v1.1 From a89a990159d450765b8a5675e640525bc6258d1b Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 4 May 2011 11:44:44 +0200 Subject: nand_spl: nand_boot.c: Init nand_chip.options to 0 Patch 65a9db7b [nand_spl: Fix large page nand_command()] broke nand booting on canyonlands. "options" has to be initialized to 0. If not, boards might have the NAND_BUSWIDTH_16 bit set, resulting in wrong offset calculation. Signed-off-by: Stefan Roese Cc: Scott Wood Cc: Alex Waterman Signed-off-by: Scott Wood --- nand_spl/nand_boot.c | 1 + 1 file changed, 1 insertion(+) (limited to 'nand_spl') diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 4628524..06c6f6d 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -246,6 +246,7 @@ void nand_boot(void) nand_info.priv = &nand_chip; nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; nand_chip.dev_ready = NULL; /* preset to NULL */ + nand_chip.options = 0; board_nand_init(&nand_chip); if (nand_chip.select_chip) -- cgit v1.1 From a9c847cb38991a557c767fd02a71bd5fbdd25a95 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 4 May 2011 11:44:14 +0200 Subject: nand_spl: nand_boot.c: Remove CONFIG_SYS_NAND_READ_DELAY There are multiple reasons why this define should be removed: First it saves some space and therefore fixes a problem we have on the canyonlands_nand and glacier_nand targets right now. Second, the define was hackish and would most likely not work on all board using nand_boot.c. Boards not providing a real dev_ready() function should implement a board specific function instead. I checked and it seems, that all boards using nand_boot.c right now already implement a board specific dev_ready() function. So this patch should not break any boards and will result in smaller NAND_SPL images. Signed-off-by: Stefan Roese Cc: Scott Wood Cc: Stefano Babic Cc: Sughosh Ganu Cc: Sudhakar Rajashekhara Tested-by: Sughosh Ganu Signed-off-by: Scott Wood --- nand_spl/nand_boot.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) (limited to 'nand_spl') diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 06c6f6d..00df2a0 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -22,9 +22,6 @@ #include #include -#define CONFIG_SYS_NAND_READ_DELAY \ - { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; } - static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS; #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512) @@ -61,11 +58,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 /* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) - ; - else - CONFIG_SYS_NAND_READ_DELAY; + while (!this->dev_ready(mtd)) + ; return 0; } @@ -80,11 +74,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 void (*hwctrl)(struct mtd_info *mtd, int cmd, unsigned int ctrl) = this->cmd_ctrl; - if (this->dev_ready) - while (!this->dev_ready(mtd)) - ; - else - CONFIG_SYS_NAND_READ_DELAY; + while (!this->dev_ready(mtd)) + ; /* Emulate NAND_CMD_READOOB */ if (cmd == NAND_CMD_READOOB) { @@ -120,11 +111,8 @@ static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 /* * Wait a while for the data to be ready */ - if (this->dev_ready) - while (!this->dev_ready(mtd)) - ; - else - CONFIG_SYS_NAND_READ_DELAY; + while (!this->dev_ready(mtd)) + ; return 0; } -- cgit v1.1