From 887e2ec9ecf49366a60a49b32b73825804909865 Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Thu, 7 Sep 2006 11:51:23 +0200
Subject: Add support for AMCC Sequoia PPC440EPx eval board - Add support for
 PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller  
 in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board,  
 please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image
 doesn't support environment   in NAND for now. This will be added in a short
 while. Patch by Stefan Roese, 07 Sep 2006

---
 nand_spl/board/amcc/sequoia/config.mk | 49 +++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 nand_spl/board/amcc/sequoia/config.mk

(limited to 'nand_spl/board/amcc/sequoia/config.mk')

diff --git a/nand_spl/board/amcc/sequoia/config.mk b/nand_spl/board/amcc/sequoia/config.mk
new file mode 100644
index 0000000..a29ba5f
--- /dev/null
+++ b/nand_spl/board/amcc/sequoia/config.mk
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2006
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# AMCC 440EPx Reference Platform (Sequoia) board
+#
+
+#
+# TEXT_BASE for SPL:
+#
+# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
+# in the last 4kBytes of memory space in cache.
+# We will copy this SPL into internal SRAM in start.S. So we set
+# TEXT_BASE to starting address in internal SRAM here.
+#
+TEXT_BASE = 0xE0013000
+
+# PAD_TO used to generate a 16kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 0x4000
+PAD_TO	= 0xE0017000
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
-- 
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