From bd6578e46d1ba93ffe6e00147704d7d18c7e5573 Mon Sep 17 00:00:00 2001 From: Terry Lv Date: Wed, 24 Feb 2010 18:34:13 +0800 Subject: ENGR00120520: Enable MMU for mx51 and mx35 MMU enable code is missed in mx51 and mx35 u-boot. So add these codes. Signed-off-by: Terry Lv --- lib_arm/Makefile | 3 -- lib_arm/cache-cp15.c | 120 --------------------------------------------------- 2 files changed, 123 deletions(-) delete mode 100644 lib_arm/cache-cp15.c (limited to 'lib_arm') diff --git a/lib_arm/Makefile b/lib_arm/Makefile index 0293348..6b1561b 100644 --- a/lib_arm/Makefile +++ b/lib_arm/Makefile @@ -39,9 +39,6 @@ GLCOBJS += div0.o COBJS-y += board.o COBJS-y += bootm.o COBJS-y += cache.o -ifndef CONFIG_SYS_NO_CP15_CACHE -COBJS-y += cache-cp15.o -endif COBJS-y += interrupts.o COBJS-y += reset.o diff --git a/lib_arm/cache-cp15.c b/lib_arm/cache-cp15.c deleted file mode 100644 index 62ed54f..0000000 --- a/lib_arm/cache-cp15.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE)) -static void cp_delay (void) -{ - volatile int i; - - /* copro seems to need some delay between reading and writing */ - for (i = 0; i < 100; i++) - nop(); -} - -/* cache_bit must be either CR_I or CR_C */ -static void cache_enable(uint32_t cache_bit) -{ - uint32_t reg; - - reg = get_cr(); /* get control reg. */ - cp_delay(); - set_cr(reg | cache_bit); -} - -/* cache_bit must be either CR_I or CR_C */ -static void cache_disable(uint32_t cache_bit) -{ - uint32_t reg; - - reg = get_cr(); - cp_delay(); - set_cr(reg & ~cache_bit); -} -#endif - -#ifdef CONFIG_SYS_NO_ICACHE -void icache_enable (void) -{ - return; -} - -void icache_disable (void) -{ - return; -} - -int icache_status (void) -{ - return 0; /* always off */ -} -#else -void icache_enable(void) -{ - cache_enable(CR_I); -} - -void icache_disable(void) -{ - cache_disable(CR_I); -} - -int icache_status(void) -{ - return (get_cr() & CR_I) != 0; -} -#endif - -#ifdef CONFIG_SYS_NO_DCACHE -void dcache_enable (void) -{ - return; -} - -void dcache_disable (void) -{ - return; -} - -int dcache_status (void) -{ - return 0; /* always off */ -} -#else -void dcache_enable(void) -{ - cache_enable(CR_C); -} - -void dcache_disable(void) -{ - cache_disable(CR_C); -} - -int dcache_status(void) -{ - return (get_cr() & CR_C) != 0; -} -#endif -- cgit v1.1