From fbe76ae4e3bacd5183294488947ec148df28d55b Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Wed, 11 Dec 2013 12:42:11 +0530 Subject: board/freescale:Remove use of CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary review purpose. So, use CONFIG_SPL_NAND_BOOT config. Signed-off-by: Prabhakar Kushwaha --- include/configs/BSC9131RDB.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/P1010RDB.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 4aed5af..584aba8 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -29,7 +29,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index f025e31..6170cbc 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -38,7 +38,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index fe5309a..ea5cb65 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -37,7 +37,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -- cgit v1.1 From 562de1d6da5bdc1789bd258d464d6ca57571861d Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 12 Dec 2013 12:09:01 +0530 Subject: board/t1040qds: Relax IFC FPGA timings Current IFC-FPGA TCH(Chip Select hold time with respect to WE deassertion) is 0 i.e. 0 ns hold time on writes. This may not work on higher clock freqencies. So, Increase TCH as 0x8 i.e. 8 ip_clk. Signed-off-by: Prabhakar Kushwaha --- include/configs/T1040QDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index d0ebd6a..8ecf188 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -248,7 +248,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -- cgit v1.1 From 9407c3fc2ea9f61243cd460a3fe64dfb396b3721 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 17 Dec 2013 11:21:08 -0800 Subject: powerpc/P1022DS: Define new nand_ecclayout structure macros Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout structure. Signed-off-by: York Sun CC: Prabhakar Kushwaha CC: Scott Wood --- include/configs/P1022DS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index ba43cce..934a6cb 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -75,6 +75,8 @@ #endif #define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 +#define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND #define CONFIG_SPL -- cgit v1.1 From ab13ad58359e803d948267881e4f495927cb7548 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 17 Dec 2013 11:21:09 -0800 Subject: powerpc/B4860QDS: Define new nand_ecclayout structure macros Define CONFIG_SYS_NAND_MAX_ECCPOS and CONFIG_SYS_NAND_MAX_OOBFREE to reduce the image size, by taking advantage of the new nand_ecclayout structure. Signed-off-by: York Sun CC: Prabhakar Kushwaha CC: Scott Wood --- include/configs/B4860QDS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 3c6cd61..c182158 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -289,6 +289,8 @@ unsigned long get_board_ddr_clk(void); /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) -- cgit v1.1 From 8fe207d0369dc31cd75b8660b48c1d77571a99e4 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Tue, 17 Dec 2013 22:11:07 -0600 Subject: powerpc/cms700: limit NAND data structure size This fixes a build break due to excessively large NAND data structures. Signed-off-by: Scott Wood Cc: Matthias Fuchs --- include/configs/CMS700.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 4a5fc86..0bb22be 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -149,6 +149,9 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 48 + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is -- cgit v1.1 From 8c618dd66adfab736b88a86f51c057b019988a90 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 26 Dec 2013 12:40:55 +0530 Subject: board/t1040qds: Enable memory reset control Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start accessing it. Signed-off-by: Prabhakar Kushwaha --- include/configs/T1040QDS.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 8ecf188..7d0bc04 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ -- cgit v1.1