From 488f5d8790c451fc527fe5d2ef218f2a5e40ea17 Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Mon, 23 Mar 2009 17:46:27 +0100 Subject: Remove nowhere used symbol CONFIG_SYS_CLKS_IN_HZ Signed-off-by: Ladislav Michl --- include/configs/ADNPESC1.h | 1 - include/configs/B2.h | 2 -- include/configs/DK1C20.h | 1 - include/configs/DK1S10.h | 1 - include/configs/EXBITGEN.h | 2 -- include/configs/SMN42.h | 2 -- include/configs/SX1.h | 2 -- include/configs/VCMA9.h | 3 --- include/configs/W7OLMC.h | 2 -- include/configs/W7OLMG.h | 2 -- include/configs/actux1.h | 2 -- include/configs/actux2.h | 2 -- include/configs/actux3.h | 2 -- include/configs/actux4.h | 2 -- include/configs/apollon.h | 1 - include/configs/armadillo.h | 2 -- include/configs/assabet.h | 2 -- include/configs/cerf250.h | 2 -- include/configs/cm4008.h | 2 -- include/configs/cm41xx.h | 2 -- include/configs/cradle.h | 2 -- include/configs/csb226.h | 2 -- include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/delta.h | 2 -- include/configs/dnp1110.h | 2 -- include/configs/eNET.h | 2 -- include/configs/ep7312.h | 2 -- include/configs/evb4510.h | 2 -- include/configs/gcplus.h | 2 -- include/configs/hymod.h | 2 -- include/configs/impa7.h | 2 -- include/configs/innokom.h | 2 -- include/configs/integratorap.h | 1 - include/configs/integratorcp.h | 1 - include/configs/ixdp425.h | 2 -- include/configs/ixdpg425.h | 1 - include/configs/lart.h | 2 -- include/configs/logodl.h | 2 -- include/configs/lpc2292sodimm.h | 2 -- include/configs/lpd7a400.h | 2 -- include/configs/lpd7a404.h | 2 -- include/configs/lubbock.h | 2 -- include/configs/modnet50.h | 2 -- include/configs/mx1ads.h | 1 - include/configs/mx1fs2.h | 2 -- include/configs/netstar.h | 2 -- include/configs/nmdk8815.h | 1 - include/configs/ns9750dev.h | 2 -- include/configs/omap1510inn.h | 2 -- include/configs/omap1610h2.h | 2 -- include/configs/omap1610inn.h | 2 -- include/configs/omap2420h4.h | 2 -- include/configs/omap3_beagle.h | 2 -- include/configs/omap3_evm.h | 3 --- include/configs/omap3_overo.h | 3 --- include/configs/omap3_pandora.h | 3 --- include/configs/omap3_zoom1.h | 2 -- include/configs/omap5912osk.h | 2 -- include/configs/omap730p2.h | 2 -- include/configs/pdnb3.h | 1 - include/configs/pleb2.h | 2 -- include/configs/pxa255_idp.h | 2 -- include/configs/sbc2410x.h | 2 -- include/configs/sc520_cdp.h | 2 -- include/configs/sc520_spunk.h | 2 -- include/configs/scb9328.h | 2 -- include/configs/shannon.h | 2 -- include/configs/smdk2400.h | 2 -- include/configs/smdk2410.h | 2 -- include/configs/trab.h | 2 -- include/configs/trizepsiv.h | 2 -- include/configs/versatile.h | 1 - include/configs/voiceblue.h | 2 -- include/configs/wepep250.h | 2 -- include/configs/xaeniax.h | 2 -- include/configs/xm250.h | 2 -- include/configs/xsengine.h | 1 - include/configs/zylonite.h | 2 -- 79 files changed, 148 deletions(-) (limited to 'include') diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h index 0977bee..b8afc17 100644 --- a/include/configs/ADNPESC1.h +++ b/include/configs/ADNPESC1.h @@ -44,7 +44,6 @@ #define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/B2.h b/include/configs/B2.h index c77ea1f..340b847 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -116,8 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0C400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0C800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0c700000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* 1 kHz */ diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index db9c17d..45ff2f7 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -50,7 +50,6 @@ #define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 3bd270c..ae567a3 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -48,7 +48,6 @@ #define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/ #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */ #define CONFIG_SYS_HZ 1000 /* 1 msec time tick */ -#undef CONFIG_SYS_CLKS_IN_HZ #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/ /*------------------------------------------------------------------------ diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index 1dd6e57..4729464 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -129,8 +129,6 @@ { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ 57600, 115200, 230400, 460800, 921600 } -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index 45e6a58..d6f41f9 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -139,8 +139,6 @@ #define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ /* for uClinux img is here*/ diff --git a/include/configs/SX1.h b/include/configs/SX1.h index 78c5152..ebc8236 100644 --- a/include/configs/SX1.h +++ b/include/configs/SX1.h @@ -133,8 +133,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index d9bcf6b..8550223 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -172,9 +172,6 @@ #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */ - -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - /* we configure PWM Timer 4 to 1us ~ 1MHz */ /*#define CONFIG_SYS_HZ 1000000 */ #define CONFIG_SYS_HZ 1562500 diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 51d0a0a..ceef76e 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -131,8 +131,6 @@ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE {9600} -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */ diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index ca1a9d4..11e0630 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -139,8 +139,6 @@ /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE {9600} -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */ diff --git a/include/configs/actux1.h b/include/configs/actux1.h index adbc399..91f6ff0 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -95,8 +95,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux2.h b/include/configs/actux2.h index 4c579eb..b936938 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -86,8 +86,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 694f522..f5ee899 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -84,8 +84,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/actux4.h b/include/configs/actux4.h index cdc9956..8d70a26 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -83,8 +83,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000 -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ /* spec says 66.666 MHz, but it appears to be 33 */ #define CONFIG_SYS_HZ 3333333 diff --git a/include/configs/apollon.h b/include/configs/apollon.h index f83dd9c..97c8806 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -196,7 +196,6 @@ #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ /* default load address */ #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h index 5a4ceaf..ef6ce22 100644 --- a/include/configs/armadillo.h +++ b/include/configs/armadillo.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 024fa20..4da68b3 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ - #define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index f19374e..751e03c 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -113,8 +113,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index ce36a24..124fad7 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -93,8 +93,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 02cb1ef..5c255ce 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -93,8 +93,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */ #define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */ diff --git a/include/configs/cradle.h b/include/configs/cradle.h index 5131175..850d93b 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/csb226.h b/include/configs/csb226.h index d65c14a..d9f85f0 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -124,8 +124,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ /* RS: where is this documented? */ /* RS: is this where U-Boot is */ diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 5d3b09a..204aea0 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -140,7 +140,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/csb472.h b/include/configs/csb472.h index a33efde..9b3a11c 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -139,7 +139,6 @@ #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */ #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 001b48a..f5508b7 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -166,8 +166,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x80800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h index e329fd3..3f658a7 100644 --- a/include/configs/dnp1110.h +++ b/include/configs/dnp1110.h @@ -109,8 +109,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 84e1aef..f7e6608 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -116,8 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h index 322a3ca..d12b13f 100644 --- a/include/configs/ep7312.h +++ b/include/configs/ep7312.h @@ -107,8 +107,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0500000 /* default load address */ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h index cbaae62..ffc9408 100644 --- a/include/configs/evb4510.h +++ b/include/configs/evb4510.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */ #define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index c0b3ab9..81ee05f 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2dacfb6..284672b 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -271,8 +271,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x03c00000 /* 4 ... 60 MB in DRAM */ -#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ diff --git a/include/configs/impa7.h b/include/configs/impa7.h index a3d023f..efd4214 100644 --- a/include/configs/impa7.h +++ b/include/configs/impa7.h @@ -106,8 +106,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */ #define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 043ae2f..895998a 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -115,8 +115,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* load kernel to this address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 6ce3b4d..9231e64 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -102,7 +102,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 5b4747a..b4219d0 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -121,7 +121,6 @@ SIB at Block62 End Block62 address 0x24f80000 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h index 70f3987..768e836 100644 --- a/include/configs/ixdp425.h +++ b/include/configs/ixdp425.h @@ -104,8 +104,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ #define CONFIG_SYS_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */ diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 193008e..75707e5 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -115,7 +115,6 @@ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ /* valid baudrates */ diff --git a/include/configs/lart.h b/include/configs/lart.h index 38b8e75..877d5c7 100644 --- a/include/configs/lart.h +++ b/include/configs/lart.h @@ -102,8 +102,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h index cd105da..9afa800 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -108,8 +108,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index 563d35b..fa2917e 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -106,8 +106,6 @@ #define CONFIG_SYS_MEMTEST_START 0x40000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for */ /* armadillo: kernel img is here*/ diff --git a/include/configs/lpd7a400.h b/include/configs/lpd7a400.h index 575f2a1..b1bd74f 100644 --- a/include/configs/lpd7a400.h +++ b/include/configs/lpd7a400.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */ /* valid baudrates */ diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h index 3e726a0..b197674 100644 --- a/include/configs/lpd7a404.h +++ b/include/configs/lpd7a404.h @@ -99,8 +99,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */ /* valid baudrates */ diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 69774d7..a4b430b 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h index 27213a8..b8ae018 100644 --- a/include/configs/modnet50.h +++ b/include/configs/modnet50.h @@ -111,8 +111,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00500000 /* default load address */ #define CONFIG_SYS_HZ 900 /* decrementer freq: 2 kHz */ diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index f136b0c..c3812e6 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -133,7 +133,6 @@ #define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ /*#define CONFIG_SYS_HZ 1000 */ #define CONFIG_SYS_HZ 3686400 diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h index a19eb78..b174b5f 100644 --- a/include/configs/mx1fs2.h +++ b/include/configs/mx1fs2.h @@ -80,8 +80,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 0b38549..37450d4 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -211,8 +211,6 @@ #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \ (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. diff --git a/include/configs/nmdk8815.h b/include/configs/nmdk8815.h index 543780d..6d7b94f 100644 --- a/include/configs/nmdk8815.h +++ b/include/configs/nmdk8815.h @@ -96,7 +96,6 @@ /* timing informazion */ #define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */ #define CONFIG_SYS_TIMERBASE 0x101E2000 -#undef CONFIG_SYS_CLKS_IN_HZ /* serial port (PL011) configuration */ #define CONFIG_PL011_SERIAL diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h index b22c33c..79dcd64 100644 --- a/include/configs/ns9750dev.h +++ b/include/configs/ns9750dev.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ #define CONFIG_SYS_HZ (CPU_CLK_FREQ/64) diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h index c7d1b6c..ac5040a 100644 --- a/include/configs/omap1510inn.h +++ b/include/configs/omap1510inn.h @@ -130,8 +130,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index e2a6360..79cf608 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -125,8 +125,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h index 5dcfce1..ce30f55 100644 --- a/include/configs/omap1610inn.h +++ b/include/configs/omap1610inn.h @@ -130,8 +130,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 983b5f2..aa82326 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -216,8 +216,6 @@ #define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */ #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */ /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 0f9344b..ad00b4c 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -219,8 +219,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f4498a9..baf71f4 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -212,9 +212,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index dee0417..02d4fbc 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -206,9 +206,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 00c0374..9a32452 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -208,9 +208,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */ - /* in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index f8ae163..b544ea1 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -216,8 +216,6 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index 63cd9c6..2bc5383 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -134,8 +134,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index 166d592..0b0d8b6 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -142,8 +142,6 @@ #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The OMAP730 has 3 general purpose MPU timers, they can be driven by diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 4da401f..edaa81b 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h index 59741a9..ab9ea4f 100644 --- a/include/configs/pleb2.h +++ b/include/configs/pleb2.h @@ -122,8 +122,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index d1c2c65..5e2e7cf 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -236,8 +236,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa0800000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index bf4a14e..102c45a 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -135,8 +135,6 @@ #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index 960350c..3e2bb02 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -116,8 +116,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index 2445a34..d42ef84 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -117,8 +117,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 5971df7..10db535 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -86,8 +86,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ diff --git a/include/configs/shannon.h b/include/configs/shannon.h index 75ba34c..717036c 100644 --- a/include/configs/shannon.h +++ b/include/configs/shannon.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */ #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h index 6388be4..856d1fb 100644 --- a/include/configs/smdk2400.h +++ b/include/configs/smdk2400.h @@ -137,8 +137,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index ecd958b..797a596 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -120,8 +120,6 @@ #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ diff --git a/include/configs/trab.h b/include/configs/trab.h index 8f13c35..625d8ee 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -316,8 +316,6 @@ #define CONFIG_SYS_MEMTEST_START 0x0C000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */ #ifdef CONFIG_TRAB_50MHZ diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 70e5ce9..c2744b5 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -163,8 +163,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/versatile.h b/include/configs/versatile.h index 852becb..8f6383b 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -144,7 +144,6 @@ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ /*----------------------------------------------------------------------- diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index cadd906..b76c794 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -210,8 +210,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h index d0afd29..717577f 100644 --- a/include/configs/wepep250.h +++ b/include/configs/wepep250.h @@ -79,8 +79,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 -#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ - #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 250247c..086ca69 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -134,8 +134,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/xm250.h b/include/configs/xm250.h index 8e9d5ab..922eb2c 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -117,8 +117,6 @@ #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 5d13f96..cad414c 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -139,7 +139,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ #define CONFIG_SYS_MEMTEST_START 0xA0400000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0xA0800000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */ #define CONFIG_SYS_LOAD_ADDR 0xA0000000 /* load kernel to this address */ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 6febeea..064740d 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -139,8 +139,6 @@ #define CONFIG_SYS_MEMTEST_START 0x9c000000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ #define CONFIG_SYS_HZ 1000 -- cgit v1.1 From 71f7bd305d9768bcb7ddbe4b5823cbf3b3597b11 Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Wed, 25 Mar 2009 23:43:50 +0100 Subject: NetStar: use generic flash driver Signed-off-by: Ladislav Michl --- include/configs/netstar.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 37450d4..e0cc718 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -59,16 +59,6 @@ #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -/* - * FLASH organization - */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024) -#define CONFIG_SYS_MAX_FLASH_SECT 19 -#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* in ticks */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) - #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) @@ -106,6 +96,16 @@ #define CONFIG_DRIVER_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 19 + +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_FLASH_CFI_LEGACY +#define CONFIG_SYS_FLASH_LEGACY_512Kx16 + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 -- cgit v1.1 From 04531f3c11c693dc54924f82c41979d960309c9d Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Wed, 25 Mar 2009 23:43:58 +0100 Subject: NetStar: add RTC support Add RTC support. Signed-off-by: Ladislav Michl --- include/configs/netstar.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/configs/netstar.h b/include/configs/netstar.h index e0cc718..1110ecc 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -110,6 +110,14 @@ #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_DRIVER_OMAP1510_I2C + +#define CONFIG_RTC_DS1307 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 @@ -133,6 +141,7 @@ */ #define CONFIG_CMD_BDI #define CONFIG_CMD_BOOTD +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH -- cgit v1.1 From 281dfb0c0c531194f99e60d6285cca4e2a9fb1b6 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:36 +0200 Subject: s3c4510b: move specific code to soc directory Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/asm-arm/arch-arm720t/hardware.h | 4 +- include/asm-arm/arch-arm720t/s3c4510b.h | 272 ------------------------------- include/asm-arm/arch-s3c4510b/hardware.h | 272 +++++++++++++++++++++++++++++++ 3 files changed, 273 insertions(+), 275 deletions(-) delete mode 100644 include/asm-arm/arch-arm720t/s3c4510b.h create mode 100644 include/asm-arm/arch-s3c4510b/hardware.h (limited to 'include') diff --git a/include/asm-arm/arch-arm720t/hardware.h b/include/asm-arm/arch-arm720t/hardware.h index 3056ca7..ec053c9 100644 --- a/include/asm-arm/arch-arm720t/hardware.h +++ b/include/asm-arm/arch-arm720t/hardware.h @@ -24,9 +24,7 @@ * MA 02111-1307 USA */ -#if defined(CONFIG_S3C4510B) -#include -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) #include #elif defined(CONFIG_IMPA7) /* include IMPA7 specific hardware file if there was one */ diff --git a/include/asm-arm/arch-arm720t/s3c4510b.h b/include/asm-arm/arch-arm720t/s3c4510b.h deleted file mode 100644 index 6b8c8ed..0000000 --- a/include/asm-arm/arch-arm720t/s3c4510b.h +++ /dev/null @@ -1,272 +0,0 @@ -#ifndef __HW_S3C4510_H -#define __HW_S3C4510_H - -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Description: Samsung S3C4510B register layout - */ - -/*------------------------------------------------------------------------ - * ASIC Address Definition - *----------------------------------------------------------------------*/ - -/* L1 8KB on chip SRAM base address */ -#define SRAM_BASE (0x03fe0000) - -/* Special Register Start Address After System Reset */ -#define REG_BASE (0x03ff0000) -#define SPSTR (REG_BASE) - -/* *********************** */ -/* System Manager Register */ -/* *********************** */ -#define REG_SYSCFG (REG_BASE+0x0000) - -#define REG_CLKCON (REG_BASE+0x3000) -#define REG_EXTACON0 (REG_BASE+0x3008) -#define REG_EXTACON1 (REG_BASE+0x300c) -#define REG_EXTDBWTH (REG_BASE+0x3010) -#define REG_ROMCON0 (REG_BASE+0x3014) -#define REG_ROMCON1 (REG_BASE+0x3018) -#define REG_ROMCON2 (REG_BASE+0x301c) -#define REG_ROMCON3 (REG_BASE+0x3020) -#define REG_ROMCON4 (REG_BASE+0x3024) -#define REG_ROMCON5 (REG_BASE+0x3028) -#define REG_DRAMCON0 (REG_BASE+0x302c) -#define REG_DRAMCON1 (REG_BASE+0x3030) -#define REG_DRAMCON2 (REG_BASE+0x3034) -#define REG_DRAMCON3 (REG_BASE+0x3038) -#define REG_REFEXTCON (REG_BASE+0x303c) - -/* *********************** */ -/* Ethernet BDMA Register */ -/* *********************** */ -#define REG_BDMATXCON (REG_BASE+0x9000) -#define REG_BDMARXCON (REG_BASE+0x9004) -#define REG_BDMATXPTR (REG_BASE+0x9008) -#define REG_BDMARXPTR (REG_BASE+0x900c) -#define REG_BDMARXLSZ (REG_BASE+0x9010) -#define REG_BDMASTAT (REG_BASE+0x9014) - -/* Content Address Memory */ -#define REG_CAM_BASE (REG_BASE+0x9100) - -#define REG_BDMATXBUF (REG_BASE+0x9200) -#define REG_BDMARXBUF (REG_BASE+0x9800) - -/* *********************** */ -/* Ethernet MAC Register */ -/* *********************** */ -#define REG_MACCON (REG_BASE+0xa000) -#define REG_CAMCON (REG_BASE+0xa004) -#define REG_MACTXCON (REG_BASE+0xa008) -#define REG_MACTXSTAT (REG_BASE+0xa00c) -#define REG_MACRXCON (REG_BASE+0xa010) -#define REG_MACRXSTAT (REG_BASE+0xa014) -#define REG_STADATA (REG_BASE+0xa018) -#define REG_STACON (REG_BASE+0xa01c) -#define REG_CAMEN (REG_BASE+0xa028) -#define REG_EMISSCNT (REG_BASE+0xa03c) -#define REG_EPZCNT (REG_BASE+0xa040) -#define REG_ERMPZCNT (REG_BASE+0xa044) -#define REG_ETXSTAT (REG_BASE+0x9040) -#define REG_MACRXDESTR (REG_BASE+0xa064) -#define REG_MACRXSTATEM (REG_BASE+0xa090) -#define REG_MACRXFIFO (REG_BASE+0xa200) - -/********************/ -/* I2C Bus Register */ -/********************/ -#define REG_I2C_CON (REG_BASE+0xf000) -#define REG_I2C_BUF (REG_BASE+0xf004) -#define REG_I2C_PS (REG_BASE+0xf008) -#define REG_I2C_COUNT (REG_BASE+0xf00c) - -/********************/ -/* GDMA 0 */ -/********************/ -#define REG_GDMACON0 (REG_BASE+0xb000) -#define REG_GDMA0_RUN_ENABLE (REG_BASE+0xb020) -#define REG_GDMASRC0 (REG_BASE+0xb004) -#define REG_GDMADST0 (REG_BASE+0xb008) -#define REG_GDMACNT0 (REG_BASE+0xb00c) - -/********************/ -/* GDMA 1 */ -/********************/ -#define REG_GDMACON1 (REG_BASE+0xc000) -#define REG_GDMA1_RUN_ENABLE (REG_BASE+0xc020) -#define REG_GDMASRC1 (REG_BASE+0xc004) -#define REG_GDMADST1 (REG_BASE+0xc008) -#define REG_GDMACNT1 (REG_BASE+0xc00c) - -/********************/ -/* UART 0 */ -/********************/ -#define UART0_BASE (REG_BASE+0xd000) -#define REG_UART0_LCON (REG_BASE+0xd000) -#define REG_UART0_CTRL (REG_BASE+0xd004) -#define REG_UART0_STAT (REG_BASE+0xd008) -#define REG_UART0_TXB (REG_BASE+0xd00c) -#define REG_UART0_RXB (REG_BASE+0xd010) -#define REG_UART0_BAUD_DIV (REG_BASE+0xd014) -#define REG_UART0_BAUD_CNT (REG_BASE+0xd018) -#define REG_UART0_BAUD_CLK (REG_BASE+0xd01C) - -/********************/ -/* UART 1 */ -/********************/ -#define UART1_BASE (REG_BASE+0xe000) -#define REG_UART1_LCON (REG_BASE+0xe000) -#define REG_UART1_CTRL (REG_BASE+0xe004) -#define REG_UART1_STAT (REG_BASE+0xe008) -#define REG_UART1_TXB (REG_BASE+0xe00c) -#define REG_UART1_RXB (REG_BASE+0xe010) -#define REG_UART1_BAUD_DIV (REG_BASE+0xe014) -#define REG_UART1_BAUD_CNT (REG_BASE+0xe018) -#define REG_UART1_BAUD_CLK (REG_BASE+0xe01C) - -/********************/ -/* Timer Register */ -/********************/ -#define REG_TMOD (REG_BASE+0x6000) -#define REG_TDATA0 (REG_BASE+0x6004) -#define REG_TDATA1 (REG_BASE+0x6008) -#define REG_TCNT0 (REG_BASE+0x600c) -#define REG_TCNT1 (REG_BASE+0x6010) - -/**********************/ -/* I/O Port Interface */ -/**********************/ -#define REG_IOPMODE (REG_BASE+0x5000) -#define REG_IOPCON (REG_BASE+0x5004) -#define REG_IOPDATA (REG_BASE+0x5008) - -/*********************************/ -/* Interrupt Controller Register */ -/*********************************/ -#define REG_INTMODE (REG_BASE+0x4000) -#define REG_INTPEND (REG_BASE+0x4004) -#define REG_INTMASK (REG_BASE+0x4008) - -#define REG_INTPRI0 (REG_BASE+0x400c) -#define REG_INTPRI1 (REG_BASE+0x4010) -#define REG_INTPRI2 (REG_BASE+0x4014) -#define REG_INTPRI3 (REG_BASE+0x4018) -#define REG_INTPRI4 (REG_BASE+0x401c) -#define REG_INTPRI5 (REG_BASE+0x4020) -#define REG_INTOFFSET (REG_BASE+0x4024) -#define REG_INTPNDPRI (REG_BASE+0x4028) -#define REG_INTPNDTST (REG_BASE+0x402C) - -/*********************************/ -/* CACHE CONTROL MASKS */ -/*********************************/ -#define CACHE_STALL (0x00000001) -#define CACHE_ENABLE (0x00000002) -#define CACHE_WRITE_BUFF (0x00000004) -#define CACHE_MODE (0x00000030) -#define CACHE_MODE_00 (0x00000000) -#define CACHE_MODE_01 (0x00000010) -#define CACHE_MODE_10 (0x00000020) - -/*********************************/ -/* CACHE RAM BASE ADDRESSES */ -/*********************************/ -#define CACHE_SET0_RAM (0x10000000) -#define CACHE_SET1_RAM (0x10800000) -#define CACHE_TAG_RAM (0x11000000) - -/*********************************/ -/* CACHE_DISABLE MASK */ -/*********************************/ -#define CACHE_DISABLE_MASK (0x04000000) - -#define GET_REG(reg) (*((volatile u32 *)(reg))) -#define PUT_REG(reg, val) (*((volatile u32 *)(reg)) = ((u32)(val))) -#define SET_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) | mask)) -#define CLR_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) & ~mask)) -#define PUT_U16(reg, val) (*((volatile u16 *)(reg)) = ((u16)(val))) -#define PUT__U8(reg, val) (*((volatile u8 *)(reg)) = (( u8)((val)&0xFF))) -#define GET__U8(reg) (*((volatile u8 *)(reg))) - -#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF)) -#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF) -#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); } -#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); } - -/***********************************/ -/* CLOCK CONSTANTS -- 50 MHz Clock */ -/***********************************/ - -#define CLK_FREQ_MHZ (50) -#define t_data_us(t) ((t)*CLK_FREQ_MHZ-1) /* t is time tick,unit[us] */ -#define t_data_ms(t) (t_data_us((t)*1000)) /* t is time tick,unit[ms] */ - -/*********************************************************/ -/* TIMER MODE REGISTER */ -/*********************************************************/ -#define TM0_RUN 0x01 /* Timer 0 enable */ -#define TM0_TOGGLE 0x02 /* 0, interval mode */ -#define TM0_OUT_1 0x04 /* Timer 0 Initial TOUT0 value */ -#define TM1_RUN 0x08 /* Timer 1 enable */ -#define TM1_TOGGLE 0x10 /* 0, interval mode */ -#define TM1_OUT_1 0x20 /* Timer 0 Initial TOUT0 value */ - - -/*********************************/ -/* INTERRUPT SOURCES */ -/*********************************/ -#define INT_EXTINT0 0 -#define INT_EXTINT1 1 -#define INT_EXTINT2 2 -#define INT_EXTINT3 3 -#define INT_UARTTX0 4 -#define INT_UARTRX0 5 -#define INT_UARTTX1 6 -#define INT_UARTRX1 7 -#define INT_GDMA0 8 -#define INT_GDMA1 9 -#define INT_TIMER0 10 -#define INT_TIMER1 11 -#define INT_HDLCTXA 12 -#define INT_HDLCRXA 13 -#define INT_HDLCTXB 14 -#define INT_HDLCRXB 15 -#define INT_BDMATX 16 -#define INT_BDMARX 17 -#define INT_MACTX 18 -#define INT_MACRX 19 -#define INT_IIC 20 -#define INT_GLOBAL 21 -#define N_IRQS (21) - -#ifndef __ASSEMBLER__ -struct _irq_handler { - void *m_data; - void (*m_func)( void *data); -}; - -#endif - -#endif /* __S3C4510_h */ diff --git a/include/asm-arm/arch-s3c4510b/hardware.h b/include/asm-arm/arch-s3c4510b/hardware.h new file mode 100644 index 0000000..6b8c8ed --- /dev/null +++ b/include/asm-arm/arch-s3c4510b/hardware.h @@ -0,0 +1,272 @@ +#ifndef __HW_S3C4510_H +#define __HW_S3C4510_H + +/* + * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) + * Curt Brune + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Description: Samsung S3C4510B register layout + */ + +/*------------------------------------------------------------------------ + * ASIC Address Definition + *----------------------------------------------------------------------*/ + +/* L1 8KB on chip SRAM base address */ +#define SRAM_BASE (0x03fe0000) + +/* Special Register Start Address After System Reset */ +#define REG_BASE (0x03ff0000) +#define SPSTR (REG_BASE) + +/* *********************** */ +/* System Manager Register */ +/* *********************** */ +#define REG_SYSCFG (REG_BASE+0x0000) + +#define REG_CLKCON (REG_BASE+0x3000) +#define REG_EXTACON0 (REG_BASE+0x3008) +#define REG_EXTACON1 (REG_BASE+0x300c) +#define REG_EXTDBWTH (REG_BASE+0x3010) +#define REG_ROMCON0 (REG_BASE+0x3014) +#define REG_ROMCON1 (REG_BASE+0x3018) +#define REG_ROMCON2 (REG_BASE+0x301c) +#define REG_ROMCON3 (REG_BASE+0x3020) +#define REG_ROMCON4 (REG_BASE+0x3024) +#define REG_ROMCON5 (REG_BASE+0x3028) +#define REG_DRAMCON0 (REG_BASE+0x302c) +#define REG_DRAMCON1 (REG_BASE+0x3030) +#define REG_DRAMCON2 (REG_BASE+0x3034) +#define REG_DRAMCON3 (REG_BASE+0x3038) +#define REG_REFEXTCON (REG_BASE+0x303c) + +/* *********************** */ +/* Ethernet BDMA Register */ +/* *********************** */ +#define REG_BDMATXCON (REG_BASE+0x9000) +#define REG_BDMARXCON (REG_BASE+0x9004) +#define REG_BDMATXPTR (REG_BASE+0x9008) +#define REG_BDMARXPTR (REG_BASE+0x900c) +#define REG_BDMARXLSZ (REG_BASE+0x9010) +#define REG_BDMASTAT (REG_BASE+0x9014) + +/* Content Address Memory */ +#define REG_CAM_BASE (REG_BASE+0x9100) + +#define REG_BDMATXBUF (REG_BASE+0x9200) +#define REG_BDMARXBUF (REG_BASE+0x9800) + +/* *********************** */ +/* Ethernet MAC Register */ +/* *********************** */ +#define REG_MACCON (REG_BASE+0xa000) +#define REG_CAMCON (REG_BASE+0xa004) +#define REG_MACTXCON (REG_BASE+0xa008) +#define REG_MACTXSTAT (REG_BASE+0xa00c) +#define REG_MACRXCON (REG_BASE+0xa010) +#define REG_MACRXSTAT (REG_BASE+0xa014) +#define REG_STADATA (REG_BASE+0xa018) +#define REG_STACON (REG_BASE+0xa01c) +#define REG_CAMEN (REG_BASE+0xa028) +#define REG_EMISSCNT (REG_BASE+0xa03c) +#define REG_EPZCNT (REG_BASE+0xa040) +#define REG_ERMPZCNT (REG_BASE+0xa044) +#define REG_ETXSTAT (REG_BASE+0x9040) +#define REG_MACRXDESTR (REG_BASE+0xa064) +#define REG_MACRXSTATEM (REG_BASE+0xa090) +#define REG_MACRXFIFO (REG_BASE+0xa200) + +/********************/ +/* I2C Bus Register */ +/********************/ +#define REG_I2C_CON (REG_BASE+0xf000) +#define REG_I2C_BUF (REG_BASE+0xf004) +#define REG_I2C_PS (REG_BASE+0xf008) +#define REG_I2C_COUNT (REG_BASE+0xf00c) + +/********************/ +/* GDMA 0 */ +/********************/ +#define REG_GDMACON0 (REG_BASE+0xb000) +#define REG_GDMA0_RUN_ENABLE (REG_BASE+0xb020) +#define REG_GDMASRC0 (REG_BASE+0xb004) +#define REG_GDMADST0 (REG_BASE+0xb008) +#define REG_GDMACNT0 (REG_BASE+0xb00c) + +/********************/ +/* GDMA 1 */ +/********************/ +#define REG_GDMACON1 (REG_BASE+0xc000) +#define REG_GDMA1_RUN_ENABLE (REG_BASE+0xc020) +#define REG_GDMASRC1 (REG_BASE+0xc004) +#define REG_GDMADST1 (REG_BASE+0xc008) +#define REG_GDMACNT1 (REG_BASE+0xc00c) + +/********************/ +/* UART 0 */ +/********************/ +#define UART0_BASE (REG_BASE+0xd000) +#define REG_UART0_LCON (REG_BASE+0xd000) +#define REG_UART0_CTRL (REG_BASE+0xd004) +#define REG_UART0_STAT (REG_BASE+0xd008) +#define REG_UART0_TXB (REG_BASE+0xd00c) +#define REG_UART0_RXB (REG_BASE+0xd010) +#define REG_UART0_BAUD_DIV (REG_BASE+0xd014) +#define REG_UART0_BAUD_CNT (REG_BASE+0xd018) +#define REG_UART0_BAUD_CLK (REG_BASE+0xd01C) + +/********************/ +/* UART 1 */ +/********************/ +#define UART1_BASE (REG_BASE+0xe000) +#define REG_UART1_LCON (REG_BASE+0xe000) +#define REG_UART1_CTRL (REG_BASE+0xe004) +#define REG_UART1_STAT (REG_BASE+0xe008) +#define REG_UART1_TXB (REG_BASE+0xe00c) +#define REG_UART1_RXB (REG_BASE+0xe010) +#define REG_UART1_BAUD_DIV (REG_BASE+0xe014) +#define REG_UART1_BAUD_CNT (REG_BASE+0xe018) +#define REG_UART1_BAUD_CLK (REG_BASE+0xe01C) + +/********************/ +/* Timer Register */ +/********************/ +#define REG_TMOD (REG_BASE+0x6000) +#define REG_TDATA0 (REG_BASE+0x6004) +#define REG_TDATA1 (REG_BASE+0x6008) +#define REG_TCNT0 (REG_BASE+0x600c) +#define REG_TCNT1 (REG_BASE+0x6010) + +/**********************/ +/* I/O Port Interface */ +/**********************/ +#define REG_IOPMODE (REG_BASE+0x5000) +#define REG_IOPCON (REG_BASE+0x5004) +#define REG_IOPDATA (REG_BASE+0x5008) + +/*********************************/ +/* Interrupt Controller Register */ +/*********************************/ +#define REG_INTMODE (REG_BASE+0x4000) +#define REG_INTPEND (REG_BASE+0x4004) +#define REG_INTMASK (REG_BASE+0x4008) + +#define REG_INTPRI0 (REG_BASE+0x400c) +#define REG_INTPRI1 (REG_BASE+0x4010) +#define REG_INTPRI2 (REG_BASE+0x4014) +#define REG_INTPRI3 (REG_BASE+0x4018) +#define REG_INTPRI4 (REG_BASE+0x401c) +#define REG_INTPRI5 (REG_BASE+0x4020) +#define REG_INTOFFSET (REG_BASE+0x4024) +#define REG_INTPNDPRI (REG_BASE+0x4028) +#define REG_INTPNDTST (REG_BASE+0x402C) + +/*********************************/ +/* CACHE CONTROL MASKS */ +/*********************************/ +#define CACHE_STALL (0x00000001) +#define CACHE_ENABLE (0x00000002) +#define CACHE_WRITE_BUFF (0x00000004) +#define CACHE_MODE (0x00000030) +#define CACHE_MODE_00 (0x00000000) +#define CACHE_MODE_01 (0x00000010) +#define CACHE_MODE_10 (0x00000020) + +/*********************************/ +/* CACHE RAM BASE ADDRESSES */ +/*********************************/ +#define CACHE_SET0_RAM (0x10000000) +#define CACHE_SET1_RAM (0x10800000) +#define CACHE_TAG_RAM (0x11000000) + +/*********************************/ +/* CACHE_DISABLE MASK */ +/*********************************/ +#define CACHE_DISABLE_MASK (0x04000000) + +#define GET_REG(reg) (*((volatile u32 *)(reg))) +#define PUT_REG(reg, val) (*((volatile u32 *)(reg)) = ((u32)(val))) +#define SET_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) | mask)) +#define CLR_REG(reg, mask) (PUT_REG((reg), GET_REG((reg)) & ~mask)) +#define PUT_U16(reg, val) (*((volatile u16 *)(reg)) = ((u16)(val))) +#define PUT__U8(reg, val) (*((volatile u8 *)(reg)) = (( u8)((val)&0xFF))) +#define GET__U8(reg) (*((volatile u8 *)(reg))) + +#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF)) +#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF) +#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); } +#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); } + +/***********************************/ +/* CLOCK CONSTANTS -- 50 MHz Clock */ +/***********************************/ + +#define CLK_FREQ_MHZ (50) +#define t_data_us(t) ((t)*CLK_FREQ_MHZ-1) /* t is time tick,unit[us] */ +#define t_data_ms(t) (t_data_us((t)*1000)) /* t is time tick,unit[ms] */ + +/*********************************************************/ +/* TIMER MODE REGISTER */ +/*********************************************************/ +#define TM0_RUN 0x01 /* Timer 0 enable */ +#define TM0_TOGGLE 0x02 /* 0, interval mode */ +#define TM0_OUT_1 0x04 /* Timer 0 Initial TOUT0 value */ +#define TM1_RUN 0x08 /* Timer 1 enable */ +#define TM1_TOGGLE 0x10 /* 0, interval mode */ +#define TM1_OUT_1 0x20 /* Timer 0 Initial TOUT0 value */ + + +/*********************************/ +/* INTERRUPT SOURCES */ +/*********************************/ +#define INT_EXTINT0 0 +#define INT_EXTINT1 1 +#define INT_EXTINT2 2 +#define INT_EXTINT3 3 +#define INT_UARTTX0 4 +#define INT_UARTRX0 5 +#define INT_UARTTX1 6 +#define INT_UARTRX1 7 +#define INT_GDMA0 8 +#define INT_GDMA1 9 +#define INT_TIMER0 10 +#define INT_TIMER1 11 +#define INT_HDLCTXA 12 +#define INT_HDLCRXA 13 +#define INT_HDLCTXB 14 +#define INT_HDLCRXB 15 +#define INT_BDMATX 16 +#define INT_BDMARX 17 +#define INT_MACTX 18 +#define INT_MACRX 19 +#define INT_IIC 20 +#define INT_GLOBAL 21 +#define N_IRQS (21) + +#ifndef __ASSEMBLER__ +struct _irq_handler { + void *m_data; + void (*m_func)( void *data); +}; + +#endif + +#endif /* __S3C4510_h */ -- cgit v1.1 From 50f601cca8985615f9e3de4c34887448ade8a64b Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:40 +0200 Subject: s3c44b0: move i2c driver to drivers/i2c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/B2.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/B2.h b/include/configs/B2.h index 340b847..d9f6e14 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -67,6 +67,8 @@ */ #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ +#define CONFIG_S3C44B0_I2C + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.1 From 5fe1377cc46199fe71c47be4b1aa81440ae96f9f Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:40 +0200 Subject: s3c44b0: move rtc driver to drivers/rtc Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/B2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/B2.h b/include/configs/B2.h index d9f6e14..9340db6 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -68,6 +68,7 @@ #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ #define CONFIG_S3C44B0_I2C +#define CONFIG_RTC_S3C44B0 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.1 From 40fd626223eae5363719bcb9a6896f08ceeee90a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:41 +0200 Subject: s3c44b0: move serial driver to drivers/serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/B2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/B2.h b/include/configs/B2.h index 9340db6..01b65c5 100644 --- a/include/configs/B2.h +++ b/include/configs/B2.h @@ -65,6 +65,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C44B0_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ #define CONFIG_S3C44B0_I2C -- cgit v1.1 From 412ab705888742add435dd6ffc2e8bda14962235 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:41 +0200 Subject: sa1100: move serial driver to drivers/serial add CONFIG_SA1100_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/assabet.h | 1 + include/configs/dnp1110.h | 1 + include/configs/gcplus.h | 1 + include/configs/lart.h | 1 + include/configs/shannon.h | 1 + 5 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/assabet.h b/include/configs/assabet.h index 4da68b3..a6c442b 100644 --- a/include/configs/assabet.h +++ b/include/configs/assabet.h @@ -57,6 +57,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on Intel Assabet */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h index 3f658a7..8f615bd 100644 --- a/include/configs/dnp1110.h +++ b/include/configs/dnp1110.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h index 81ee05f..77d4578 100644 --- a/include/configs/gcplus.h +++ b/include/configs/gcplus.h @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/lart.h b/include/configs/lart.h index 877d5c7..e34ec22 100644 --- a/include/configs/lart.h +++ b/include/configs/lart.h @@ -52,6 +52,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/shannon.h b/include/configs/shannon.h index 717036c..c8b0b16 100644 --- a/include/configs/shannon.h +++ b/include/configs/shannon.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_SA1100_SERIAL #define CONFIG_SERIAL3 1 /* we use SERIAL 3 */ /* allow to overwrite serial and ethaddr */ -- cgit v1.1 From 9ea91c9fefb3920d735533a7798c1a44a3ed3ffc Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:41 +0200 Subject: netarm: move serial driver to drivers/serial add CONFIG_NETARM_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/modnet50.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h index b8ae018..74bab5f 100644 --- a/include/configs/modnet50.h +++ b/include/configs/modnet50.h @@ -56,6 +56,7 @@ /* * select serial console configuration */ +#define CONFIG_NETARM_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ -- cgit v1.1 From 6d27bca15d445fcf07d6e7e30ced95c945c875ea Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:42 +0200 Subject: s3c64xx: move usb driver to drivers/usb add CONFIG_USB_S3C64XX to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/smdk6400.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 06d6a88..d3cf6e5 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -288,6 +288,7 @@ #if !defined(CONFIG_ENABLE_MMU) #define CONFIG_CMD_USB 1 +#define CONFIG_USB_S3C64XX #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400" -- cgit v1.1 From 176a600d0ecdaccbac483d2ba992d0119f853119 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:42 +0200 Subject: ks8695: move serial driver to drivers/serial add CONFIG_KS8695_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/cm4008.h | 1 + include/configs/cm41xx.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 124fad7..7ea1a46 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 5c255ce..ea374da 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -53,6 +53,7 @@ * select serial console configuration */ #define CONFIG_ENV_IS_NOWHERE +#define CONFIG_KS8695_SERIAL #define CONFIG_SERIAL1 #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -- cgit v1.1 From 6790c55704531eb98f76b51d50e0f73d19fa2988 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:42 +0200 Subject: lpc2292: move serial driver to drivers/serial add CONFIG_LPC2292_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/SMN42.h | 1 + include/configs/lpc2292sodimm.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h index d6f41f9..05f6d9f 100644 --- a/include/configs/SMN42.h +++ b/include/configs/SMN42.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h index fa2917e..1515038 100644 --- a/include/configs/lpc2292sodimm.h +++ b/include/configs/lpc2292sodimm.h @@ -59,6 +59,7 @@ /* * select serial console configuration */ +#define CONFIG_LPC2292_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ -- cgit v1.1 From a6ef3ddeafbe8007af3662cc4509b897c53ab395 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 29 Mar 2009 23:01:42 +0200 Subject: arm720t/clps7111: move serial driver to drivers/serial add CONFIG_CLPS7111_SERIAL to activate the driver Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/armadillo.h | 1 + include/configs/ep7312.h | 1 + include/configs/impa7.h | 1 + 3 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h index ef6ce22..7ba5e17 100644 --- a/include/configs/armadillo.h +++ b/include/configs/armadillo.h @@ -64,6 +64,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h index d12b13f..630fff3 100644 --- a/include/configs/ep7312.h +++ b/include/configs/ep7312.h @@ -55,6 +55,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/impa7.h b/include/configs/impa7.h index efd4214..c7001cc 100644 --- a/include/configs/impa7.h +++ b/include/configs/impa7.h @@ -54,6 +54,7 @@ /* * select serial console configuration */ +#define CONFIG_CLPS7111_SERIAL #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ /* allow to overwrite serial and ethaddr */ -- cgit v1.1 From d3e55d0774a180c1837bd7ddec464015e883bd86 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 30 Mar 2009 18:58:38 +0200 Subject: imx: move serial driver to drivers/serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/mx1ads.h | 1 + include/configs/mx1fs2.h | 3 ++- include/configs/scb9328.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index c3812e6..12e567b 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -40,6 +40,7 @@ /* * Select serial console configuration */ +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 /* internal uart 1 */ /* #define _CONFIG_UART2 */ /* internal uart 2 */ /* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h index b174b5f..431e669 100644 --- a/include/configs/mx1fs2.h +++ b/include/configs/mx1fs2.h @@ -289,11 +289,12 @@ 0x000b00b ->3<- -> 64MHz/4=16MHz */ #ifdef _CONFIG_UART1 +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 #elif defined _CONFIG_UART2 +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL2 #elif defined _CONFIG_UART3 | defined _CONFIG_UART4 -#define CONFIG_IMX_SERIAL_NONE #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 3686400 diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 10db535..2f166c9 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -29,6 +29,7 @@ #define CONFIG_SCB9328 1 /* on a scb9328tronix board */ #undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */ +#define CONFIG_IMX_SERIAL #define CONFIG_IMX_SERIAL1 /* * Select serial console configuration -- cgit v1.1 From ee4f3e2765a1c65c9861c5d2cf2e6feb84b90bd8 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 30 Mar 2009 18:58:39 +0200 Subject: davinci: move nand driver to drivers/mtd/nand Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/davinci_dvevm.h | 1 + include/configs/davinci_schmoogie.h | 1 + include/configs/davinci_sffsdr.h | 1 + include/configs/davinci_sonata.h | 1 + 4 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 667c0d8..b43beaa 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -112,6 +112,7 @@ /* Flash & Environment */ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND +#define CONFIG_NAND_DAVINCI #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 22d3808..2c97a00 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -81,6 +81,7 @@ /*=====================*/ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_NAND_DAVINCI #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE SZ_128K diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 875bab6..9354c2f 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -77,6 +77,7 @@ /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH +#define CONFIG_NAND_DAVINCI #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ #define CONFIG_ENV_SIZE SZ_128K diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 47ab27a..0865d0d 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -112,6 +112,7 @@ /* Flash & Environment */ /*=====================*/ #ifdef CONFIG_SYS_USE_NAND +#define CONFIG_NAND_DAVINCI #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ -- cgit v1.1 From 300f99f4539dd5caf7e19af5e4ea5eb259445913 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 30 Mar 2009 18:58:39 +0200 Subject: s3c24x0: move serial driver to drivers/serial Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/VCMA9.h | 1 + include/configs/sbc2410x.h | 1 + include/configs/smdk2400.h | 1 + include/configs/smdk2410.h | 1 + include/configs/trab.h | 1 + 5 files changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 8550223..5e614fd 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -117,6 +117,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */ /************************************************************ diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index 102c45a..2b659e3 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */ /************************************************************ diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h index 856d1fb..ffdf217 100644 --- a/include/configs/smdk2400.h +++ b/include/configs/smdk2400.h @@ -63,6 +63,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */ #undef CONFIG_HWFLOW /* include RTS/CTS flow control support */ diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index 797a596..fb43706 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -60,6 +60,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */ /************************************************************ diff --git a/include/configs/trab.h b/include/configs/trab.h index 625d8ee..520fe36 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -111,6 +111,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */ #define CONFIG_HWFLOW /* include RTS/CTS flow control support */ -- cgit v1.1 From b3f66b0ba09949e0796ce7fad6367f75f15ed890 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 30 Mar 2009 18:58:40 +0200 Subject: s3c2410: move nand driver to drivers/mtd/nand Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/sbc2410x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index 2b659e3..af00187 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -199,6 +199,7 @@ * NAND flash settings */ #if defined(CONFIG_CMD_NAND) +#define CONFIG_NAND_S3C2410 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 -- cgit v1.1 From 81472d893fa565c9d300928a40e504a689bde131 Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Mon, 30 Mar 2009 18:58:41 +0200 Subject: OMAP: rename timer divisor Divisor field is called PTV not PVT. Signed-off-by: Ladislav Michl Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/SX1.h | 6 +++--- include/configs/apollon.h | 6 ++---- include/configs/netstar.h | 4 ++-- include/configs/omap1510inn.h | 6 +++--- include/configs/omap1610h2.h | 4 ++-- include/configs/omap1610inn.h | 4 ++-- include/configs/omap2420h4.h | 10 +++++----- include/configs/omap3_beagle.h | 6 ++---- include/configs/omap3_evm.h | 6 ++---- include/configs/omap3_overo.h | 6 ++---- include/configs/omap3_pandora.h | 6 ++---- include/configs/omap3_zoom1.h | 6 ++---- include/configs/omap5912osk.h | 4 ++-- include/configs/omap730p2.h | 7 +++---- include/configs/voiceblue.h | 6 +++--- 15 files changed, 37 insertions(+), 50 deletions(-) (limited to 'include') diff --git a/include/configs/SX1.h b/include/configs/SX1.h index ebc8236..caa6592 100644 --- a/include/configs/SX1.h +++ b/include/configs/SX1.h @@ -138,9 +138,9 @@ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/apollon.h b/include/configs/apollon.h index 97c8806..04da083 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -203,11 +203,9 @@ * or by 32KHz clk, or from external sig. This rate is divided by a local * divisor. */ -#define V_PVT 7 /* use with 12MHz/128 */ - #define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 1110ecc..39560de 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -226,8 +226,8 @@ * This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(pvt+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h index ac5040a..6c1c5ec 100644 --- a/include/configs/omap1510inn.h +++ b/include/configs/omap1510inn.h @@ -135,9 +135,9 @@ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index 79cf608..42e0198 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -131,8 +131,8 @@ * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h index ce30f55..22c873e 100644 --- a/include/configs/omap1610inn.h +++ b/include/configs/omap1610inn.h @@ -136,8 +136,8 @@ * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index aa82326..331bf45 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -222,14 +222,14 @@ * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ #ifdef CONFIG_APTIX -#define V_PVT 3 +#define V_PTV 3 #else -#define V_PVT 7 /* use with 12MHz/128 */ +#define V_PTV 7 /* use with 12MHz/128 */ #endif -#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2 +#define CONFIG_SYS_PTV V_PTV /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ad00b4c..7db1eb7 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -226,11 +226,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index baf71f4..2f532d5 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -219,11 +219,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 02d4fbc..0c32100 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -213,11 +213,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 9a32452..fb4e50d 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -215,11 +215,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index b544ea1..883234a 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -223,11 +223,9 @@ * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by * 32KHz clk, or from external sig. This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index 2bc5383..d0ce9dc 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -140,8 +140,8 @@ * DPLL1. This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index 0b0d8b6..32a9b23 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -148,10 +148,9 @@ * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a * local divisor. */ - -#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h index b76c794..3f97843 100644 --- a/include/configs/voiceblue.h +++ b/include/configs/voiceblue.h @@ -213,9 +213,9 @@ /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. * This time is further subdivided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ -- cgit v1.1