From ad10dd9aaf573fefe1cbd9d446a24f07f8b87428 Mon Sep 17 00:00:00 2001 From: stroese Date: Fri, 14 Feb 2003 11:21:23 +0000 Subject: Add "pcidelay" environment variable (in ms, enabled via CONFIG_PCI_BOOTDELAY). --- include/common.h | 3 ++- include/configs/AR405.h | 4 ++++ include/configs/CPCI405.h | 3 +++ include/configs/CPCI4052.h | 3 +++ include/configs/CPCI440.h | 4 ++++ include/configs/DU405.h | 4 ++++ include/configs/OCRTC.h | 2 ++ 7 files changed, 22 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/common.h b/include/common.h index d9d5702..9f22b2f 100644 --- a/include/common.h +++ b/include/common.h @@ -149,10 +149,11 @@ void setenv (char *, char *); # include /* ARM version to be fixed! */ #endif /* CONFIG_ARM */ #ifdef CONFIG_I386 /* x86 version to be fixed! */ -# include +# include #endif /* CONFIG_I386 */ void pci_init (void); +void pci_init_board(void); void pciinfo (int, int); #if defined(CONFIG_PCI) && defined(CONFIG_440) diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 56bb15b..acb2fb6 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -122,6 +122,10 @@ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ +#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ + +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0403 /* PCI Device ID: ARISTO405 */ #define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 6b98347..845b47b 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -74,6 +74,7 @@ CFG_CMD_IRQ | \ CFG_CMD_IDE | \ CFG_CMD_ELF | \ + CFG_CMD_MII | \ CFG_CMD_EEPROM ) #define CONFIG_MAC_PARTITION @@ -144,6 +145,8 @@ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ #define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 0533827..18cec98 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -80,6 +80,7 @@ CFG_CMD_DATE | \ CFG_CMD_JFFS2 | \ CFG_CMD_I2C | \ + CFG_CMD_MII | \ CFG_CMD_EEPROM ) #define CONFIG_MAC_PARTITION @@ -150,6 +151,8 @@ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ #define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A */ diff --git a/include/configs/CPCI440.h b/include/configs/CPCI440.h index 04ce99d..55bb1ec 100644 --- a/include/configs/CPCI440.h +++ b/include/configs/CPCI440.h @@ -237,6 +237,10 @@ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ +#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ + +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ #define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ #define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 1bf40d9..bac6221 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -120,6 +120,10 @@ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ +#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ + +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0404 /* PCI Device ID: CPCI-ISER4 */ #define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */ diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 5971fb4..0ac456a 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -120,6 +120,8 @@ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ +#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/ + #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0410 /* PCI Device ID: OCRTC */ #define CFG_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ -- cgit v1.1