From 3473ab737282b08ad61841fcbb14c4d264a93a8e Mon Sep 17 00:00:00 2001 From: Jason Jin Date: Tue, 13 May 2008 11:50:36 +0800 Subject: Feed the watchdog in u-boot for 8610 board. The watchdog on 8610 board is enabled by setting sw[6] to on. Once enabled, the watchdog can not be disabled by software. So feed the dog in u-boot is necessary for normal operation. Signed-off-by: Jason Jin --- include/asm-ppc/immap_86xx.h | 16 +++++++++++++++- include/configs/MPC8610HPCD.h | 3 ++- 2 files changed, 17 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index c03b4b8..03a25c7 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -1304,9 +1304,21 @@ typedef struct ccsr_gur { uint lynxdcr1; /* 0xe0f08 - Lynx debug control register 1*/ int res14[6]; uint ddrioovcr; /* 0xe0f24 - DDR IO Overdrive Control register */ - char res15[61656]; + char res15[216]; } ccsr_gur_t; +/* + * Watchdog register block(0xe_4000-0xe_4fff) + */ +typedef struct ccsr_wdt { + uint res0; + uint swcrr; /* System watchdog control register */ + uint swcnr; /* System watchdog count register */ + char res1[2]; + ushort swsrr; /* System watchdog service register */ + char res2[4080]; +} ccsr_wdt_t; + typedef struct immap { ccsr_local_mcm_t im_local_mcm; ccsr_ddr_t im_ddr1; @@ -1330,6 +1342,8 @@ typedef struct immap { char res5[389120]; ccsr_rio_t im_rio; ccsr_gur_t im_gur; + char res6[12288]; + ccsr_wdt_t im_wdt; } immap_t; extern immap_t *immr; diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index fc16890..98ae34c 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -485,7 +485,8 @@ #endif -#undef CONFIG_WATCHDOG /* watchdog disabled */ +#define CONFIG_WATCHDOG /* watchdog enabled */ +#define CFG_WATCHDOG_FREQ 5000 /* Feed interval, 5s */ /*DIU Configuration*/ #define DIU_CONNECT_TO_DVI /* DIU controller connects to DVI encoder*/ -- cgit v1.1 From 16bee7b0dc294ee01ca2434aa1dd3bd717a69615 Mon Sep 17 00:00:00 2001 From: Martha Marx Date: Thu, 29 May 2008 15:37:21 -0400 Subject: Consolidate ADS5121 IO Pin configuration Consolidate ADS5121 IO Pin configuration to one file board/ads5121/iopin.c. Remove pin config from cpu/mpc512x/fec.c Signed-off-by: Martha Marx Acked-by: Grant Likely Acked-by: John Rigby --- include/configs/ads5121.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 4226529..22277d9 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -27,6 +27,7 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_ADS5121 1 /* * Memory map for the ADS5121 board: * -- cgit v1.1 From f31c49db2a5e076f415c0785eb37f67f2faa5fc8 Mon Sep 17 00:00:00 2001 From: Martha Marx Date: Thu, 29 May 2008 14:23:25 -0400 Subject: Configuration changes for ADS5121 Rev 3 ADS5121 Rev 3 board is now the default config config targets are now ads5121_config Rev 3 board with PCI M41T62 on board RTC 512MB DRAM ads5121_rev2_config Rev 2 board with No PCI 256MB DRAM Signed-off-by: Martha Marx Acked-by: Grant Likely Acked-by: John Rigby --- include/configs/ads5121.h | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 22277d9..f104e68 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -58,7 +58,12 @@ /* CONFIG_PCI is defined at config time */ +#ifdef CONFIG_ADS5121_REV2 #define CFG_MPC512X_CLKIN 66000000 /* in Hz */ +#else +#define CFG_MPC512X_CLKIN 33333333 /* in Hz */ +#define CONFIG_PCI +#endif #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R @@ -72,7 +77,11 @@ /* * DDR Setup - manually set all parameters as there's no SPD etc. */ +#ifdef CONFIG_ADS5121_REV2 #define CFG_DDR_SIZE 256 /* MB */ +#else +#define CFG_DDR_SIZE 512 /* MB */ +#endif #define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SDRAM_BASE CFG_DDR_BASE @@ -120,14 +129,20 @@ * [09:05] DRAM tRP: * [04:00] DRAM tRPA */ - +#ifdef CONFIG_ADS5121_REV2 #define CFG_MDDRC_SYS_CFG 0xF8604A00 #define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 +#define CFG_MDDRC_TIME_CFG1 0x54EC1168 +#define CFG_MDDRC_TIME_CFG2 0x35210864 +#else +#define CFG_MDDRC_SYS_CFG 0xFA804A00 +#define CFG_MDDRC_SYS_CFG_RUN 0xEA804A00 +#define CFG_MDDRC_TIME_CFG1 0x68EC1168 +#define CFG_MDDRC_TIME_CFG2 0x34310864 +#endif #define CFG_MDDRC_SYS_CFG_EN 0xF0000000 #define CFG_MDDRC_TIME_CFG0 0x00003D2E #define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E -#define CFG_MDDRC_TIME_CFG1 0x54EC1168 -#define CFG_MDDRC_TIME_CFG2 0x35210864 #define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_PCHG_ALL 0x01100400 @@ -166,12 +181,17 @@ /* * NOR FLASH on the Local Bus */ +#undef CONFIG_BKUP_FLASH #define CFG_FLASH_CFI /* use the Common Flash Interface */ #define CFG_FLASH_CFI_DRIVER /* use the CFI driver */ +#ifdef CONFIG_BKUP_FLASH +#define CFG_FLASH_BASE 0xFF800000 /* start of FLASH */ +#define CFG_FLASH_SIZE 0x00800000 /* max flash size in bytes */ +#else #define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */ #define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */ +#endif #define CFG_FLASH_USE_BUFFER_WRITE - #define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_MAX_FLASH_SECT 256 /* max sectors per device */ @@ -287,14 +307,13 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1 #define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_FEC_AN_TIMEOUT 1 -#if 0 /* * Configure on-board RTC */ -#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ +#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */ #define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ -#endif /* * Environment @@ -303,7 +322,11 @@ /* This has to be a multiple of the Flash sector size */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x2000 +#ifdef CONFIG_BKUP_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */ +#else #define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ +#endif /* Address and size of Redundant Environment Sector */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) @@ -322,6 +345,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_DATE #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -- cgit v1.1 From c6457e3b8bc79a97381cf7deffa08f7c5a24f86c Mon Sep 17 00:00:00 2001 From: Sergey Lapin Date: Thu, 5 Jun 2008 11:06:29 +0400 Subject: DataFlash AT45DB021 support Some boards based on AT91SAM926X-EK use smaller DF chips to keep bootstrap, u-boot and its environment, using NAND or other external storage for kernel and rootfs. This patch adds support for small 1024x263 chip. Signed-off-by: Sergey Lapin --- include/dataflash.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/dataflash.h b/include/dataflash.h index f20c738..80f0633 100644 --- a/include/dataflash.h +++ b/include/dataflash.h @@ -137,6 +137,7 @@ struct dataflash_addr { /*-------------------------------------------------------------------------------------------------*/ #define AT45DB161 0x2c +#define AT45DB021 0x14 #define AT45DB321 0x34 #define AT45DB642 0x3c #define AT45DB128 0x10 -- cgit v1.1 From 56d52615cd47bc522ee13bb7ec7e59d6ce9426c7 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Wed, 18 Jun 2008 13:21:19 -0500 Subject: ColdFire: Fix code flash configuration for M547x/M548x boards Signed-off-by: Kurt Mahan --- include/configs/M5475EVB.h | 4 ++-- include/configs/M5485EVB.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index a19c342..e8804b5 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -303,9 +303,9 @@ #define CFG_CS0_CTRL 0x00101980 #ifdef CFG_NOR1SZ -#define CFG_CS1_BASE 0xF8000000 +#define CFG_CS1_BASE 0xE0000000 #define CFG_CS1_MASK (((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001) -#define CFG_CS1_CTRL 0x00000D80 +#define CFG_CS1_CTRL 0x00101D80 #endif #endif /* _M5475EVB_H */ diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index b73e2e0..0f957ff 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -289,9 +289,9 @@ #define CFG_CS0_CTRL 0x00101980 #ifdef CFG_NOR1SZ -#define CFG_CS1_BASE 0xF8000000 +#define CFG_CS1_BASE 0xE0000000 #define CFG_CS1_MASK (((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001) -#define CFG_CS1_CTRL 0x00000D80 +#define CFG_CS1_CTRL 0x00101D80 #endif #endif /* _M5485EVB_H */ -- cgit v1.1 From 94603c2fd4dbe0655878416aa0da9f302d4c30d3 Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Wed, 18 Jun 2008 19:14:01 -0500 Subject: ColdFire: Fix timer issue for MCF5272 The timer was assigned to wrong timer memory mapped which caused udelay() and timer() not working properly. Signed-off-by: TsiChung Liew --- include/asm-m68k/timer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-m68k/timer.h b/include/asm-m68k/timer.h index 030720c..1a5de05 100644 --- a/include/asm-m68k/timer.h +++ b/include/asm-m68k/timer.h @@ -33,7 +33,7 @@ /****************************************************************************/ /* DMA Timer module registers */ typedef struct dtimer_ctrl { -#if defined(CONFIG_M5249) || defined(CONFIG_M5253) +#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5272) u16 tmr; /* 0x00 Mode register */ u16 res1; /* 0x02 */ u16 trr; /* 0x04 Reference register */ -- cgit v1.1 From 0e0c4357d14a3563c6a2a1e6d5ad6a2cc4f35cab Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Wed, 9 Jul 2008 15:21:44 -0500 Subject: Fix compile error caused by missing timer function Add #define CONFIG_MCFTMR in EB+MCF-EV123.h configuration file Signed-off-by: TsiChung Liew --- include/configs/EB+MCF-EV123.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index 417099e..324eb6c 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -84,6 +84,8 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET +#define CONFIG_MCFTMR + #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC # define CONFIG_NET_MULTI 1 -- cgit v1.1 From c15947d6ce0d59925c97fdfac692476af6e262d0 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 10 Jul 2008 10:46:33 -0400 Subject: ARM: Fix for broken compilation when defining CONFIG_CMD_ELF caused by missing dcache status/enable/disable functions. Signed-off-by: Hugo Villeneuve --- include/configs/davinci_sffsdr.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 0e49e6c..7c860e5 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -137,6 +137,7 @@ #define CONFIG_CMD_SAVES #define CONFIG_CMD_NAND #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF /* Needed to load Integrity kernel. */ #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR -- cgit v1.1 From dbf3dfb386a2d5d2381814e39985ab2e21894550 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 11 Jul 2008 02:39:14 +0200 Subject: Enable passing of ATAGs required by latest Linux kernel. --- include/configs/pxa255_idp.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 4a9cadb..b7ea1a9 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -208,6 +208,10 @@ /* "protect off" */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +/* #define CONFIG_INITRD_TAG 1 */ + #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -- cgit v1.1 From 53ea981c3124b13c137c2d10e975b7c6672266e0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 11 Jul 2008 10:10:31 +0200 Subject: microblaze: Clean uartlite driver Redesign uartlite driver to in_be32 and out_be32 macros Fix missing header in io.h Signed-off-by: Michal Simek Acked-by: Grant Likely --- include/asm-microblaze/io.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-microblaze/io.h b/include/asm-microblaze/io.h index aa37a60..8804724 100644 --- a/include/asm-microblaze/io.h +++ b/include/asm-microblaze/io.h @@ -16,6 +16,8 @@ #ifndef __MICROBLAZE_IO_H__ #define __MICROBLAZE_IO_H__ +#include + #define IO_SPACE_LIMIT 0xFFFFFFFF #define readb(addr) \ -- cgit v1.1 From 84a2c64a26dc5e275e1cf4e76a6e194a18fb5477 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 11 Jul 2008 10:10:32 +0200 Subject: microblaze: Remove useless ancient headers Signed-off-by: Michal Simek --- .../asm-microblaze/arch-microblaze/xbasic_types.h | 301 --------------------- include/asm-microblaze/arch-microblaze/xio.h | 63 ----- .../asm-microblaze/arch-microblaze/xuartlite_l.h | 256 ------------------ include/asm-microblaze/serial_xuartlite.h | 25 -- 4 files changed, 645 deletions(-) delete mode 100644 include/asm-microblaze/arch-microblaze/xbasic_types.h delete mode 100644 include/asm-microblaze/arch-microblaze/xio.h delete mode 100644 include/asm-microblaze/arch-microblaze/xuartlite_l.h delete mode 100644 include/asm-microblaze/serial_xuartlite.h (limited to 'include') diff --git a/include/asm-microblaze/arch-microblaze/xbasic_types.h b/include/asm-microblaze/arch-microblaze/xbasic_types.h deleted file mode 100644 index 25012e6..0000000 --- a/include/asm-microblaze/arch-microblaze/xbasic_types.h +++ /dev/null @@ -1,301 +0,0 @@ -/****************************************************************************** -* -* Author: Xilinx, Inc. -* -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of the GNU General Public License as published by the -* Free Software Foundation; either version 2 of the License, or (at your -* option) any later version. -* -* -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A -* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS -* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, -* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE -* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING -* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. -* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO -* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY -* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM -* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND -* FITNESS FOR A PARTICULAR PURPOSE. -* -* -* Xilinx hardware products are not intended for use in life support -* appliances, devices, or systems. Use in such applications is -* expressly prohibited. -* -* -* (c) Copyright 2002-2003 Xilinx Inc. -* All rights reserved. -* -* -* You should have received a copy of the GNU General Public License along -* with this program; if not, write to the Free Software Foundation, Inc., -* 675 Mass Ave, Cambridge, MA 02139, USA. -* -******************************************************************************/ -/*****************************************************************************/ -/** -* -* @file xbasic_types.h -* -* This file contains basic types for Xilinx software IP. These types do not -* follow the standard naming convention with respect to using the component -* name in front of each name because they are considered to be primitives. -* -* @note -* -* This file contains items which are architecture dependent. -* -* 
-* MODIFICATION HISTORY:
-*
-* Ver	 Who	Date	Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00a rmm  12/14/01 First release
-*	rmm  05/09/03 Added "xassert always" macros to rid ourselves of diab
-*		      compiler warnings
-*
-* -******************************************************************************/ - -#ifndef XBASIC_TYPES_H /* prevent circular inclusions */ -#define XBASIC_TYPES_H /* by using protection macros */ - -/***************************** Include Files *********************************/ - -/************************** Constant Definitions *****************************/ - -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef NULL -#define NULL 0 -#endif -/** Null */ - -#define XCOMPONENT_IS_READY 0x11111111 /* component has been initialized */ -#define XCOMPONENT_IS_STARTED 0x22222222 /* component has been started */ - -/* the following constants and declarations are for unit test purposes and are - * designed to be used in test applications. - */ -#define XTEST_PASSED 0 -#define XTEST_FAILED 1 - -#define XASSERT_NONE 0 -#define XASSERT_OCCURRED 1 - -extern unsigned int XAssertStatus; -extern void XAssert(char *, int); - -/**************************** Type Definitions *******************************/ - -/** @name Primitive types - * These primitive types are created for transportability. - * They are dependent upon the target architecture. - * @{ - */ -#include - -typedef struct { - u32 Upper; - u32 Lower; -} Xuint64; - -/* Xilinx's unsigned integer types */ -typedef u32 Xuint32; -typedef u16 Xuint16; -typedef u8 Xuint8; - -/* and signed integer types */ -typedef s32 Xint32; -typedef s16 Xint16; -typedef s8 Xint8; - -#ifndef NULL -#define NULL 0 -#endif - -typedef unsigned long Xboolean; -#define XNULL NULL - -#define XTRUE 1 -#define XFALSE 0 - -/*@}*/ - -/** - * This data type defines an interrupt handler for a device. - * The argument points to the instance of the component - */ -typedef void (*XInterruptHandler) (void *InstancePtr); - -/** - * This data type defines a callback to be invoked when an - * assert occurs. The callback is invoked only when asserts are enabled - */ -typedef void (*XAssertCallback) (char *FilenamePtr, int LineNumber); - -/***************** Macros (Inline Functions) Definitions *********************/ - -/*****************************************************************************/ -/** -* Return the most significant half of the 64 bit data type. -* -* @param x is the 64 bit word. -* -* @return -* -* The upper 32 bits of the 64 bit word. -* -* @note -* -* None. -* -******************************************************************************/ -#define XUINT64_MSW(x) ((x).Upper) - -/*****************************************************************************/ -/** -* Return the least significant half of the 64 bit data type. -* -* @param x is the 64 bit word. -* -* @return -* -* The lower 32 bits of the 64 bit word. -* -* @note -* -* None. -* -******************************************************************************/ -#define XUINT64_LSW(x) ((x).Lower) - -#ifndef NDEBUG - -/*****************************************************************************/ -/** -* This assert macro is to be used for functions that do not return anything -* (void). This in conjunction with the XWaitInAssert boolean can be used to -* accomodate tests so that asserts which fail allow execution to continue. -* -* @param expression is the expression to evaluate. If it evaluates to false, -* the assert occurs. -* -* @return -* -* Returns void unless the XWaitInAssert variable is true, in which case -* no return is made and an infinite loop is entered. -* -* @note -* -* None. -* -******************************************************************************/ -#define XASSERT_VOID(expression) \ -{ \ - if (expression) { \ - XAssertStatus = XASSERT_NONE; \ - } else { \ - XAssert(__FILE__, __LINE__); \ - XAssertStatus = XASSERT_OCCURRED; \ - return; \ - } \ -} - -/*****************************************************************************/ -/** -* This assert macro is to be used for functions that do return a value. This in -* conjunction with the XWaitInAssert boolean can be used to accomodate tests so -* that asserts which fail allow execution to continue. -* -* @param expression is the expression to evaluate. If it evaluates to false, -* the assert occurs. -* -* @return -* -* Returns 0 unless the XWaitInAssert variable is true, in which case -* no return is made and an infinite loop is entered. -* -* @note -* -* None. -* -******************************************************************************/ -#define XASSERT_NONVOID(expression) \ -{ \ - if (expression) { \ - XAssertStatus = XASSERT_NONE; \ - } else { \ - XAssert(__FILE__, __LINE__); \ - XAssertStatus = XASSERT_OCCURRED; \ - return 0; \ - } \ -} - -/*****************************************************************************/ -/** -* Always assert. This assert macro is to be used for functions that do not -* return anything (void). Use for instances where an assert should always -* occur. -* -* @return -* -* Returns void unless the XWaitInAssert variable is true, in which case -* no return is made and an infinite loop is entered. -* -* @note -* -* None. -* -******************************************************************************/ -#define XASSERT_VOID_ALWAYS() \ -{ \ - XAssert(__FILE__, __LINE__); \ - XAssertStatus = XASSERT_OCCURRED; \ - return; \ -} - -/*****************************************************************************/ -/** -* Always assert. This assert macro is to be used for functions that do return -* a value. Use for instances where an assert should always occur. -* -* @return -* -* Returns void unless the XWaitInAssert variable is true, in which case -* no return is made and an infinite loop is entered. -* -* @note -* -* None. -* -******************************************************************************/ -#define XASSERT_NONVOID_ALWAYS() \ -{ \ - XAssert(__FILE__, __LINE__); \ - XAssertStatus = XASSERT_OCCURRED; \ - return 0; \ -} - -#else - -#define XASSERT_VOID(expression) -#define XASSERT_VOID_ALWAYS() -#define XASSERT_NONVOID(expression) -#define XASSERT_NONVOID_ALWAYS() -#endif - -/************************** Function Prototypes ******************************/ - -void XAssertSetCallback(XAssertCallback Routine); - -#endif /* end of protection macro */ diff --git a/include/asm-microblaze/arch-microblaze/xio.h b/include/asm-microblaze/arch-microblaze/xio.h deleted file mode 100644 index 7eed327..0000000 --- a/include/asm-microblaze/arch-microblaze/xio.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * xio.h - * - * Defines XIo functions for Xilinx OCP in terms of Linux primitives - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under the terms - * of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#ifndef XIO_H -#define XIO_H - -#include "xbasic_types.h" -#include - -typedef u32 XIo_Address; - -extern inline u8 -XIo_In8(XIo_Address InAddress) -{ - return (u8) in_8((volatile unsigned char *) InAddress); -} -extern inline u16 -XIo_In16(XIo_Address InAddress) -{ - return (u16) in_be16((volatile unsigned short *) InAddress); -} -extern inline u32 -XIo_In32(XIo_Address InAddress) -{ - return (u32) in_be32((volatile unsigned *) InAddress); -} -extern inline void -XIo_Out8(XIo_Address OutAddress, u8 Value) -{ - out_8((volatile unsigned char *) OutAddress, Value); -} -extern inline void -XIo_Out16(XIo_Address OutAddress, u16 Value) -{ - out_be16((volatile unsigned short *) OutAddress, Value); -} -extern inline void -XIo_Out32(XIo_Address OutAddress, u32 Value) -{ - out_be32((volatile unsigned *) OutAddress, Value); -} - -#define XIo_ToLittleEndian16(s,d) (*(u16*)(d) = cpu_to_le16((u16)(s))) -#define XIo_ToLittleEndian32(s,d) (*(u32*)(d) = cpu_to_le32((u32)(s))) -#define XIo_ToBigEndian16(s,d) (*(u16*)(d) = cpu_to_be16((u16)(s))) -#define XIo_ToBigEndian32(s,d) (*(u32*)(d) = cpu_to_be32((u32)(s))) - -#define XIo_FromLittleEndian16(s,d) (*(u16*)(d) = le16_to_cpu((u16)(s))) -#define XIo_FromLittleEndian32(s,d) (*(u32*)(d) = le32_to_cpu((u32)(s))) -#define XIo_FromBigEndian16(s,d) (*(u16*)(d) = be16_to_cpu((u16)(s))) -#define XIo_FromBigEndian32(s,d) (*(u32*)(d) = be32_to_cpu((u32)(s))) - -#endif /* XIO_H */ diff --git a/include/asm-microblaze/arch-microblaze/xuartlite_l.h b/include/asm-microblaze/arch-microblaze/xuartlite_l.h deleted file mode 100644 index b381a0d..0000000 --- a/include/asm-microblaze/arch-microblaze/xuartlite_l.h +++ /dev/null @@ -1,256 +0,0 @@ -/***************************************************************************** -* -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" -* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND -* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, -* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, -* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION -* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, -* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE -* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY -* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE -* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR -* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF -* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -* FOR A PARTICULAR PURPOSE. -* -* (c) Copyright 2002 Xilinx Inc. -* All rights reserved. -* -*****************************************************************************/ -/****************************************************************************/ -/** -* -* @file xuartlite_l.h -* -* This header file contains identifiers and low-level driver functions (or -* macros) that can be used to access the device. High-level driver functions -* are defined in xuartlite.h. -* -* 
-* MODIFICATION HISTORY:
-*
-* Ver	Who  Date     Changes
-* ----- ---- -------- -----------------------------------------------
-* 1.00b rpm  04/25/02 First release
-*
-* -*****************************************************************************/ - -#ifndef XUARTLITE_L_H /* prevent circular inclusions */ -#define XUARTLITE_L_H /* by using protection macros */ - -/***************************** Include Files ********************************/ - -#include "xbasic_types.h" -#include "xio.h" - -/************************** Constant Definitions ****************************/ - -/* UART Lite register offsets */ - -#define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */ -#define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */ -#define XUL_STATUS_REG_OFFSET 8 /* status register, read only */ -#define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */ - -/* control register bit positions */ - -#define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */ -#define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */ -#define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */ - -/* status register bit positions */ - -#define XUL_SR_PARITY_ERROR 0x80 -#define XUL_SR_FRAMING_ERROR 0x40 -#define XUL_SR_OVERRUN_ERROR 0x20 -#define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */ -#define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */ -#define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */ -#define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */ -#define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */ - -/* the following constant specifies the size of the FIFOs, the size of the - * FIFOs includes the transmitter and receiver such that it is the total number - * of bytes that the UART can buffer - */ -#define XUL_FIFO_SIZE 16 - -/* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a - * per instance basis - */ -#define XUL_STOP_BITS 1 - -/* Parity definitions - */ -#define XUL_PARITY_NONE 0 -#define XUL_PARITY_ODD 1 -#define XUL_PARITY_EVEN 2 - -/**************************** Type Definitions ******************************/ - -/***************** Macros (Inline Functions) Definitions ********************/ - -/***************************************************************************** -* -* Low-level driver macros and functions. The list below provides signatures -* to help the user use the macros. -* -* void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask) -* u32 XUartLite_mGetControlReg(u32 BaseAddress) -* u32 XUartLite_mGetStatusReg(u32 BaseAddress) -* -* Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress) -* Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress) -* Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress) -* -* void XUartLite_mEnableIntr(u32 BaseAddress) -* void XUartLite_mDisableIntr(u32 BaseAddress) -* -* void XUartLite_SendByte(u32 BaseAddress, u8 Data); -* u8 XUartLite_RecvByte(u32 BaseAddress); -* -*****************************************************************************/ - -/****************************************************************************/ -/** -* -* Set the contents of the control register. Use the XUL_CR_* constants defined -* above to create the bit-mask to be written to the register. -* -* @param BaseAddress is the base address of the device -* @param Mask is the 32-bit value to write to the control register -* -* @return None. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mSetControlReg(BaseAddress, Mask) \ - XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask)) - - -/****************************************************************************/ -/** -* -* Get the contents of the control register. Use the XUL_CR_* constants defined -* above to interpret the bit-mask returned. -* -* @param BaseAddress is the base address of the device -* -* @return A 32-bit value representing the contents of the control register. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mGetControlReg(BaseAddress) \ - XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET) - - -/****************************************************************************/ -/** -* -* Get the contents of the status register. Use the XUL_SR_* constants defined -* above to interpret the bit-mask returned. -* -* @param BaseAddress is the base address of the device -* -* @return A 32-bit value representing the contents of the status register. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mGetStatusReg(BaseAddress) \ - XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET) - - -/****************************************************************************/ -/** -* -* Check to see if the receiver has data. -* -* @param BaseAddress is the base address of the device -* -* @return XTRUE if the receiver is empty, XFALSE if there is data present. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mIsReceiveEmpty(BaseAddress) \ - (!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA)) - - -/****************************************************************************/ -/** -* -* Check to see if the transmitter is full. -* -* @param BaseAddress is the base address of the device -* -* @return XTRUE if the transmitter is full, XFALSE otherwise. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mIsTransmitFull(BaseAddress) \ - (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL) - - -/****************************************************************************/ -/** -* -* Check to see if the interrupt is enabled. -* -* @param BaseAddress is the base address of the device -* -* @return XTRUE if the interrupt is enabled, XFALSE otherwise. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mIsIntrEnabled(BaseAddress) \ - (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED) - - -/****************************************************************************/ -/** -* -* Enable the device interrupt. Preserve the contents of the control register. -* -* @param BaseAddress is the base address of the device -* -* @return None. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mEnableIntr(BaseAddress) \ - XUartLite_mSetControlReg((BaseAddress), \ - XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR) - - -/****************************************************************************/ -/** -* -* Disable the device interrupt. Preserve the contents of the control register. -* -* @param BaseAddress is the base address of the device -* -* @return None. -* -* @note None. -* -*****************************************************************************/ -#define XUartLite_mDisableIntr(BaseAddress) \ - XUartLite_mSetControlReg((BaseAddress), \ - XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR) - - -/************************** Function Prototypes *****************************/ - -void XUartLite_SendByte(u32 BaseAddress, u8 Data); -u8 XUartLite_RecvByte(u32 BaseAddress); - - -#endif /* end of protection macro */ diff --git a/include/asm-microblaze/serial_xuartlite.h b/include/asm-microblaze/serial_xuartlite.h deleted file mode 100644 index 6cd1e83..0000000 --- a/include/asm-microblaze/serial_xuartlite.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * (C) Copyright 2004 Atmark Techno, Inc. - * - * Yasushi SHOJI - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -- cgit v1.1 From 6ecbb45bb027e90c19d63b48e7b0c05acc1a87c0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 11 Jul 2008 11:50:53 +0200 Subject: hwmon: Cleaning hwmon devices Clean Makefile Move device specific values to driver for better reading Signed-off-by: Michal Simek Acked-by: Stefan Roese --- include/dtt.h | 77 ++--------------------------------------------------------- 1 file changed, 2 insertions(+), 75 deletions(-) (limited to 'include') diff --git a/include/dtt.h b/include/dtt.h index 4e8aaad..34053d1 100644 --- a/include/dtt.h +++ b/include/dtt.h @@ -40,9 +40,11 @@ #define DTT_COMMERCIAL_MAX_TEMP 70 /* 0 - +70 C */ #define DTT_INDUSTRIAL_MAX_TEMP 85 /* -40 - +85 C */ #define DTT_AUTOMOTIVE_MAX_TEMP 105 /* -40 - +105 C */ + #ifndef CFG_DTT_MAX_TEMP #define CFG_DTT_MAX_TEMP DTT_COMMERCIAL_MAX_TEMP #endif + #ifndef CFG_DTT_HYSTERESIS #define CFG_DTT_HYSTERESIS 5 /* 5 C */ #endif @@ -54,79 +56,4 @@ extern int dtt_write(int sensor, int reg, int val); extern int dtt_get_temp(int sensor); #endif -#if defined(CONFIG_DTT_LM75) -#define DTT_READ_TEMP 0x0 -#define DTT_CONFIG 0x1 -#define DTT_TEMP_HYST 0x2 -#define DTT_TEMP_SET 0x3 -#endif - -#if defined(CONFIG_DTT_LM81) -#define DTT_READ_TEMP 0x27 -#define DTT_CONFIG_TEMP 0x4b -#define DTT_TEMP_MAX 0x39 -#define DTT_TEMP_HYST 0x3a -#define DTT_CONFIG 0x40 -#endif - -#if defined(CONFIG_DTT_DS1621) -#define DTT_READ_TEMP 0xAA -#define DTT_READ_COUNTER 0xA8 -#define DTT_READ_SLOPE 0xA9 -#define DTT_WRITE_START_CONV 0xEE -#define DTT_WRITE_STOP_CONV 0x22 -#define DTT_TEMP_HIGH 0xA1 -#define DTT_TEMP_LOW 0xA2 -#define DTT_CONFIG 0xAC -#endif - -#if defined(CONFIG_DTT_DS1775) -#define DTT_READ_TEMP 0x0 -#define DTT_CONFIG 0x1 -#define DTT_TEMP_HYST 0x2 -#define DTT_TEMP_OS 0x3 -#endif - -#if defined(CONFIG_DTT_ADM1021) -#define DTT_READ_LOC_VALUE 0x00 -#define DTT_READ_REM_VALUE 0x01 -#define DTT_READ_STATUS 0x02 -#define DTT_READ_CONFIG 0x03 -#define DTT_READ_CONVRATE 0x04 -#define DTT_READ_LOC_HIGHLIM 0x05 -#define DTT_READ_LOC_LOWLIM 0x06 -#define DTT_READ_REM_HIGHLIM 0x07 -#define DTT_READ_REM_LOWLIM 0x08 -#define DTT_READ_DEVID 0xfe - -#define DTT_WRITE_CONFIG 0x09 -#define DTT_WRITE_CONVRATE 0x0a -#define DTT_WRITE_LOC_HIGHLIM 0x0b -#define DTT_WRITE_LOC_LOWLIM 0x0c -#define DTT_WRITE_REM_HIGHLIM 0x0d -#define DTT_WRITE_REM_LOWLIM 0x0e -#define DTT_WRITE_ONESHOT 0x0f - -#define DTT_STATUS_BUSY 0x80 /* 1=ADC Converting */ -#define DTT_STATUS_LHIGH 0x40 /* 1=Local High Temp Limit Tripped */ -#define DTT_STATUS_LLOW 0x20 /* 1=Local Low Temp Limit Tripped */ -#define DTT_STATUS_RHIGH 0x10 /* 1=Remote High Temp Limit Tripped */ -#define DTT_STATUS_RLOW 0x08 /* 1=Remote Low Temp Limit Tripped */ -#define DTT_STATUS_OPEN 0x04 /* 1=Remote Sensor Open-Circuit */ - -#define DTT_CONFIG_ALERT_MASKED 0x80 /* 0=ALERT Enabled, 1=ALERT Masked */ -#define DTT_CONFIG_STANDBY 0x40 /* 0=Run, 1=Standby */ - -#define DTT_ADM1021_DEVID 0x41 -#endif - -#if defined(CONFIG_DTT_LM73) -#define DTT_READ_TEMP 0x0 -#define DTT_CONFIG 0x1 -#define DTT_TEMP_HIGH 0x2 -#define DTT_TEMP_LOW 0x3 -#define DTT_CONTROL 0x4 -#define DTT_ID 0x7 -#endif - #endif /* _DTT_H_ */ -- cgit v1.1 From 18c8a28aad49803780bd8d52432ded528e37e701 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 11 Jul 2008 15:11:57 +0200 Subject: hwmon: rename CONFIG_DS1722 to CONFIG_DTT_DS1722 Signed-off-by: Michal Simek Acked-by: Stefan Roese --- include/configs/sc520_spunk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index 051b2e0..072675b 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -144,7 +144,7 @@ #define CONFIG_SPI_EEPROM /* SPI EEPROMs such as AT25010 or AT25640 */ #define CONFIG_MW_EEPROM /* MicroWire EEPROMS such as AT93LC46 */ -#define CONFIG_DS1722 /* Dallas DS1722 SPI Temperature probe */ +#define CONFIG_DTT_DS1722 /* Dallas DS1722 SPI Temperature probe */ /* allow to overwrite serial and ethaddr */ -- cgit v1.1 From 25dbe98abb686d8210e1731fba85ced7d3ce874c Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 13 Jul 2008 23:07:35 +0200 Subject: Fix some more printf() format issues. Signed-off-by: Wolfgang Denk --- include/configs/pxa255_idp.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index b7ea1a9..a2f3650 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -126,7 +126,10 @@ #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTCOMMAND "bootm 40000" #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" -#define CONFIG_CMDLINE_TAG + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +/* #define CONFIG_INITRD_TAG 1 */ /* * Current memory map for Vibren supplied Linux images: @@ -208,10 +211,6 @@ /* "protect off" */ -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -/* #define CONFIG_INITRD_TAG 1 */ - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -- cgit v1.1 From ab5cda9f88c3eaf9cf599adc3a3375906c4ed904 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 7 Jul 2008 18:02:08 -0500 Subject: Remove LBC_CACHE_BASE from 8544 DS The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping space for some anyway, we were allowing speculative loads into unmapped space, which would cause an exception (annoying, even if ultimately harmless). Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the problem. Signed-off-by: Andy Fleming --- include/configs/MPC8544DS.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 669f4d7c..2a12c05 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -148,8 +148,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CFG_BOOT_BLOCK 0xfc000000 /* boot TLB */ -#define CFG_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */ - #define CFG_FLASH_BASE 0xff800000 /* start of FLASH 8M */ #define CFG_BR0_PRELIM 0xff801001 -- cgit v1.1 From 6b70ffb9d1b2e791161f3cf92937aa45b4a07b78 Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Mon, 16 Jun 2008 15:55:53 -0500 Subject: fdt: add crypto node handling for MPC8{3, 5}xxE processors Delete the crypto node if not on an E-processor. If on 8360 or 834x family, check rev and up-rev crypto node (to SEC rev. 2.4 property values) if on an 'EA' processor, e.g. MPC8349EA. Signed-off-by: Kim Phillips --- include/asm-ppc/processor.h | 9 +++++++++ include/fdt_support.h | 6 ++++++ include/mpc83xx.h | 7 ++++++- 3 files changed, 21 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 10fd478..6734857 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -885,6 +885,15 @@ /* Some parts define SVR[0:23] as the SOC version */ #define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF) /* SOC Version fields */ +/* whether MPC8xxxE (i.e. has SEC) */ +#if defined(CONFIG_MPC85xx) +#define IS_E_PROCESSOR(svr) (svr & 0x80000) +#else +#if defined(CONFIG_MPC83XX) +#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) +#endif +#endif + /* * SVR_SOC_VER() Version Values */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 890993f..a7c6326 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -56,6 +56,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd); static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} #endif /* CONFIG_HAS_FSL_DR_USB */ +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX) +void fdt_fixup_crypto_node(void *blob, int sec_rev); +#else +static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} +#endif + #ifdef CONFIG_OF_BOARD_SETUP void ft_board_setup(void *blob, bd_t *bd); void ft_cpu_setup(void *blob, bd_t *bd); diff --git a/include/mpc83xx.h b/include/mpc83xx.h index 939b825..897ecd6 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -61,21 +61,26 @@ #endif #define PARTID_NO_E(spridr) ((spridr & 0xFFFE0000) >> 16) -#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) /* has SEC */ +#define SPR_FAMILY(spridr) ((spridr & 0xFFF00000) >> 20) +#define SPR_831X_FAMILY 0x80B #define SPR_8311 0x80B2 #define SPR_8313 0x80B0 #define SPR_8314 0x80B6 #define SPR_8315 0x80B4 +#define SPR_832X_FAMILY 0x806 #define SPR_8321 0x8066 #define SPR_8323 0x8062 +#define SPR_834X_FAMILY 0x803 #define SPR_8343 0x8036 #define SPR_8347_TBGA_ 0x8032 #define SPR_8347_PBGA_ 0x8034 #define SPR_8349 0x8030 +#define SPR_836X_FAMILY 0x804 #define SPR_8358_TBGA_ 0x804A #define SPR_8358_PBGA_ 0x804E #define SPR_8360 0x8048 +#define SPR_837X_FAMILY 0x80C #define SPR_8377 0x80C6 #define SPR_8378 0x80C4 #define SPR_8379 0x80C2 -- cgit v1.1 From 6de5bf24004c8d9c9b070bb8f7418d1c45e5eb27 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 11 Jul 2008 15:33:03 -0400 Subject: sbc8560: proper definitions for TSEC. The definitions for the TSEC have become out of date. There is no longer any such options like "CONFIG_MPC85xx_TSEC1" or similar. Update to match those of other boards, like the MPC8560ADS. Signed-off-by: Paul Gortmaker Acked-by: Ben Warren --- include/configs/sbc8560.h | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 146eafe..f07fbc0 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -215,16 +215,28 @@ #define CFG_PCI_MEM_PHYS 0xC0000000 #define CFG_PCI_MEM_SIZE 0x10000000 -#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */ - -# define CONFIG_NET_MULTI 1 -# define CONFIG_MII 1 /* MII PHY management */ -# define CONFIG_MPC85xx_TSEC1 -# define CONFIG_MPC85xx_TSEC1_NAME "TSEC0" -# define TSEC1_PHY_ADDR 25 -# define TSEC1_PHYIDX 0 -/* Options are: TSEC0 */ -# define CONFIG_ETHPRIME "TSEC0" +#ifdef CONFIG_TSEC_ENET + +#ifndef CONFIG_NET_MULTI +#define CONFIG_NET_MULTI 1 +#endif + +#ifndef CONFIG_MII +#define CONFIG_MII 1 /* MII PHY management */ +#endif +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "TSEC0" +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "TSEC1" +#define TSEC1_PHY_ADDR 0x19 +#define TSEC2_PHY_ADDR 0x1a +#define TSEC1_PHYIDX 0 +#define TSEC2_PHYIDX 0 +#define TSEC1_FLAGS TSEC_GIGABIT +#define TSEC2_FLAGS TSEC_GIGABIT + +/* Options are: TSEC[0-1] */ +#define CONFIG_ETHPRIME "TSEC0" #elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */ -- cgit v1.1 From c158bcaca3b31cbe38c4143812e6170e38a57393 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 11 Jul 2008 15:33:05 -0400 Subject: sbc8560: define eth0 and eth1 instead of eth1 and eth2 The existing config doesn't define CONFIG_HAS_ETH0, and so the fdt support doesn't update the zeros in the dtb local-mac with real data from the u-boot env. Since the existing config is tailored to just two interfaces, get rid of the ETH2 definitions at the same time. Also don't include any end user specific data into the environment by default -- things like MAC address, network parameters etc. need to come from the end user. Signed-off-by: Paul Gortmaker Signed-off-by: Andy Fleming --- include/configs/sbc8560.h | 55 +++++++++++++++++++++++++---------------------- 1 file changed, 29 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index f07fbc0..6e4cc4a 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -102,11 +102,11 @@ #define CFG_SDRAM_SIZE 512 /* DDR is 512MB */ #define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */ -#undef CONFIG_DDR_ECC /* only for ECC DDR module */ -#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#undef CONFIG_DDR_ECC /* only for ECC DDR module */ +#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #if defined(CONFIG_MPC85xx_REV1) - #define CONFIG_DDR_DLL /* possible DLL fix needed */ + #define CONFIG_DDR_DLL /* possible DLL fix needed */ #endif #undef CONFIG_CLOCKS_IN_MHZ @@ -177,8 +177,8 @@ #define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ /* Serial Port */ -#undef CONFIG_CONS_ON_SCC /* define if console on SCC */ -#undef CONFIG_CONS_NONE /* define if console on something else */ +#undef CONFIG_CONS_ON_SCC /* define if console on SCC */ +#undef CONFIG_CONS_NONE /* define if console on something else */ #define CONFIG_CONS_INDEX 1 #undef CONFIG_SERIAL_SOFTWARE_FIFO @@ -284,20 +284,20 @@ * FLASH and environment organization */ -#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ -#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */ +#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ +#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */ #if 0 -#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CFG_FLASH_PROTECTION /* use hardware protection */ +#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ +#define CFG_FLASH_PROTECTION /* use hardware protection */ #endif -#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #undef CFG_FLASH_CHECKSUM -#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ +#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */ -#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ +#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */ #if 0 /* XXX This doesn't work and I don't want to fix it */ @@ -327,9 +327,8 @@ #define CFG_ENV_SIZE 0x2000 #endif -#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=192.168.0.251:/tftpboot ip=192.168.0.105:192.168.0.251::255.255.255.0:sbc8560:eth0:off console=ttyS0,9600" +#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=dhcp console=ttyS0,9600" /*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/ -#define CONFIG_BOOTCOMMAND "bootm 0xff800000 0xffa00000" #define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -405,19 +404,23 @@ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif -/*Note: change below for your network setting!!! */ #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) -# define CONFIG_ETHADDR 00:01:af:07:9b:8a -# define CONFIG_HAS_ETH1 -# define CONFIG_ETH1ADDR 00:01:af:07:9b:8b -# define CONFIG_HAS_ETH2 -# define CONFIG_ETH2ADDR 00:01:af:07:9b:8c +#define CONFIG_HAS_ETH0 +#define CONFIG_HAS_ETH1 #endif -#define CONFIG_SERVERIP 192.168.0.131 -#define CONFIG_IPADDR 192.168.0.105 -#define CONFIG_GATEWAYIP 0.0.0.0 -#define CONFIG_NETMASK 255.255.255.0 +/* You can compile in a MAC address and your custom net settings by using + * the following syntax. Your board should be marked with the assigned + * MAC addresses directly on it. + * + * #define CONFIG_ETHADDR de:ad:be:ef:00:00 + * #define CONFIG_ETH1ADDR fa:ke:ad:dr:es:s! + * #define CONFIG_SERVERIP + * #define CONFIG_IPADDR + * #define CONFIG_GATEWAYIP + * #define CONFIG_NETMASK + */ + #define CONFIG_HOSTNAME SBC8560 #define CONFIG_ROOTPATH /home/ppc #define CONFIG_BOOTFILE pImage -- cgit v1.1 From 37fef499104e28e0a83b02b85ca0d1fbe80d294a Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 11 Jul 2008 15:33:07 -0400 Subject: sbc8560: add default fdt values Add in the default fdt settings and the typical EXTRA_ENV settings as borrowed from the mpc8560ads. Fix a couple of stale references to the mpc8560ads dating back to the original clone/fork. Signed-off-by: Paul Gortmaker Signed-off-by: Andy Fleming --- include/configs/sbc8560.h | 38 +++++++++++++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 6e4cc4a..ef6ed22 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -24,8 +24,8 @@ * MA 02111-1307 USA */ -/* mpc8560ads board configuration file */ -/* please refer to doc/README.mpc85xx for more info */ +/* sbc8560 board configuration file */ +/* please refer to doc/README.sbc8560 for more info */ /* make sure you change the MAC address and other network params first, * search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file */ @@ -400,8 +400,8 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ #if defined(CONFIG_CMD_KGDB) - #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ - #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC) @@ -423,6 +423,34 @@ #define CONFIG_HOSTNAME SBC8560 #define CONFIG_ROOTPATH /home/ppc -#define CONFIG_BOOTFILE pImage +#define CONFIG_BOOTFILE uImage + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=ramdisk.uboot\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=sbc8560.dtb\0" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND #endif /* __CONFIG_H */ -- cgit v1.1 From 6b44a44ec2aab180d7095c1c92e669cee1d3e3bd Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 14 Jul 2008 20:04:40 -0500 Subject: Fix indentation for default boot environment variables This was proposed by Paul Gortmaker in response to Wolfgang's comments on similar #defines in sbc8560.h. Signed-off-by: Andy Fleming --- include/configs/MPC8560ADS.h | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index edf8525..27212162 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -538,29 +538,29 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyCPM\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=mpc8560ads.dtb\0" + "netdev=eth0\0" \ + "consoledev=ttyCPM\0" \ + "ramdiskaddr=1000000\0" \ + "ramdiskfile=your.ramdisk.u-boot\0" \ + "fdtaddr=400000\0" \ + "fdtfile=mpc8560ads.dtb\0" #define CONFIG_NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" #define CONFIG_RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND -- cgit v1.1 From c3ca7e5e00a24451f20df3bded9a61ba541921df Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 11 Jul 2008 15:33:08 -0400 Subject: sbc8560: enable CONFIG_OF_LIBFDT by default Make the default build for the sbc8560 board be powerpc capable with libfdt support. Signed-off-by: Paul Gortmaker --- include/configs/sbc8560.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index ef6ed22..6345cce 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -200,6 +200,11 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + /* * I2C */ -- cgit v1.1 From 7f9f4347cf325c63a39fe30910f3fb211ae2cc15 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 14 Jul 2008 14:07:02 -0500 Subject: 85xx: Add some L1/L2 SPR register definitions Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala --- include/asm-ppc/processor.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 6734857..e617868 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -426,6 +426,7 @@ /* e500 definitions */ #define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */ #define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */ +#define SPRN_L2CFG0 0x207 /* L2 Cache Configuration Register 0 */ #define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */ #define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ @@ -434,6 +435,21 @@ #define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ #define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ #define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ +#define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */ +#define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */ +#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ +#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ +#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */ +#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */ +#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */ +#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */ +#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */ +#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */ +#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ +#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */ +#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ +#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ +#define SPRN_L2CSR1 0x3fa /* L2 Data Cache Control and Status Register 1 */ #define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */ #define SPRN_MAS0 0x270 /* MMU Assist Register 0 */ @@ -624,8 +640,12 @@ #define MCSRR1 SPRN_MCSRR1 #define L1CSR0 SPRN_L1CSR0 #define L1CSR1 SPRN_L1CSR1 +#define L1CSR2 SPRN_L1CSR2 #define L1CFG0 SPRN_L1CFG0 #define L1CFG1 SPRN_L1CFG1 +#define L2CFG0 SPRN_L2CFG0 +#define L2CSR0 SPRN_L2CSR0 +#define L2CSR1 SPRN_L2CSR1 #define MCSR SPRN_MCSR #define MMUCSR0 SPRN_MMUCSR0 #define BUCSR SPRN_BUCSR -- cgit v1.1 From 630d9bfcb5f6d3a43f251901a6b480994dcb6ea3 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 14 Jul 2008 14:07:03 -0500 Subject: MPC8544DS: Add ATI Video card support Add support for using a PCIe ATI Video card on PCIe2. Signed-off-by: Kumar Gala --- include/configs/MPC8544DS.h | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 2a12c05..8f4fbf1 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -224,7 +224,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ -#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ +#define CFG_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ /* Serial Port - controlled on board with jumper J8 * open - index 2 @@ -312,6 +312,26 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_PCI) +/*PCIE video card used*/ +#define VIDEO_IO_OFFSET CFG_PCIE2_IO_PHYS + +/*PCI video card used*/ +/*#define VIDEO_IO_OFFSET CFG_PCI1_IO_PHYS*/ + +/* video */ +#define CONFIG_VIDEO + +#if defined(CONFIG_VIDEO) +#define CONFIG_BIOSEMU +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_ATI_RADEON_FB +#define CONFIG_VIDEO_LOGO +/*#define CONFIG_CONSOLE_CURSOR*/ +#define CFG_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET +#endif + #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ @@ -380,7 +400,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if CFG_MONITOR_BASE > 0xfff80000 #define CFG_ENV_ADDR 0xfff80000 #else -#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000) +#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x70000) #endif #define CFG_ENV_SIZE 0x2000 #define CFG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */ -- cgit v1.1 From 4524561820a9327e89107854b3a7187800ccf719 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 14 Jul 2008 20:26:57 -0500 Subject: Remove fake flash bank from 8544 DS The fake flash bank was generating errors for anyone who didn't have a PromJET hooked up to the board. As that constitutes the vast majority of users, we remove it. Signed-off-by: Andy Fleming --- include/configs/MPC8544DS.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 8f4fbf1..58b1357 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -156,10 +156,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_OR0_PRELIM 0xff806e65 #define CFG_OR1_PRELIM 0xff806e65 -#define CFG_FLASH_BANKS_LIST {0xfe800000,CFG_FLASH_BASE} +#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_FLASH_QUIET_TEST -#define CFG_MAX_FLASH_BANKS 2 /* number of banks */ +#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_MAX_FLASH_SECT 128 /* sectors per device */ #undef CFG_FLASH_CHECKSUM #define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -- cgit v1.1 From 1107014e835ec9d46c0333f4211d104f77442db0 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Mon, 14 Jul 2008 20:29:07 -0500 Subject: Clean up INIT_RAM options The L2_INIT_RAM option was unused, and recent changes to the TLB code meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce the amount of mapped space attached to nothing, we change things so the TLBs get cleared. Signed-off-by: Andy Fleming --- include/configs/MPC8544DS.h | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 58b1357..091fd2e 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -201,23 +201,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM 1 -#define CFG_INIT_L1_LOCK 1 -#define CFG_INIT_L1_ADDR 0xf4010000 /* Initial L1 address */ -#define CFG_INIT_L1_END 0x00004000 /* End of used area in RAM */ - -/* define to use L2SRAM as initial stack */ -#undef CONFIG_L2_INIT_RAM -#define CFG_INIT_L2_ADDR 0xf8fc0000 -#define CFG_INIT_L2_END 0x00040000 /* End of used area in RAM */ - -#ifdef CONFIG_L1_INIT_RAM -#define CFG_INIT_RAM_ADDR CFG_INIT_L1_ADDR -#define CFG_INIT_RAM_END CFG_INIT_L1_END -#else -#define CFG_INIT_RAM_ADDR CFG_INIT_L2_ADDR -#define CFG_INIT_RAM_END CFG_INIT_L2_END -#endif +#define CONFIG_L1_INIT_RAM +#define CFG_INIT_RAM_LOCK 1 +#define CFG_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ +#define CFG_INIT_RAM_END 0x00004000 /* End of used area in RAM */ + #define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -- cgit v1.1 From e2d31fb3450653115452144363d5bde4e5e3e693 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 19 Jun 2008 17:56:11 -0500 Subject: Update Freescale sys_eeprom.c to handle CCID formats Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The NXID format replaces the older CCID format, but it's important to support both since most boards out there still use the CCID format. This change is in preparation for using one file to handle both formats. This will also unify EEPROM support for all Freescale 85xx and 86xx boards. Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR instead of ID_EEPROM_ADDR. Signed-off-by: Timur Tabi --- include/configs/MPC8610HPCD.h | 8 ++++---- include/configs/MPC8641HPCN.h | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 98ae34c..06899b1 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -140,11 +140,11 @@ #endif #endif -#define CFG_ID_EEPROM -#ifdef CFG_ID_EEPROM #define CONFIG_ID_EEPROM -#endif -#define ID_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_NXID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_FLASH_BASE 0xf0000000 /* start of FLASH 128M */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 455e154..cd35494 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -152,11 +152,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_DDR_CS5_BNDS 0x00000FFF /* Not done */ #endif -#define CFG_ID_EEPROM 1 -#ifdef CFG_ID_EEPROM #define CONFIG_ID_EEPROM -#endif -#define ID_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_NXID +#define CFG_ID_EEPROM +#define CFG_I2C_EEPROM_ADDR 0x57 +#define CFG_I2C_EEPROM_ADDR_LEN 1 /* * In MPC8641HPCN, allocate 16MB flash spaces at fe000000 and ff000000. -- cgit v1.1 From 5e0de0e216b8fb27634afb11c60a2fa24c23349e Mon Sep 17 00:00:00 2001 From: Andre Schwarz Date: Wed, 9 Jul 2008 18:30:44 +0200 Subject: mpc5xxx: Add MVBC_P board support The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet controller (using e1000) and custom Altera Cyclone-II FPGA on PCI. Signed-off-by: Andre Schwarz Signed-off-by: Grant Likely --- include/configs/MVBC_P.h | 316 +++++++++++++++++++++++++++++++++++++++++++++++ include/mpc5xxx.h | 29 +++++ 2 files changed, 345 insertions(+) create mode 100644 include/configs/MVBC_P.h (limited to 'include') diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h new file mode 100644 index 0000000..04580b7 --- /dev/null +++ b/include/configs/MVBC_P.h @@ -0,0 +1,316 @@ +/* + * (C) Copyright 2003-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2004-2008 + * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_MPC5xxx 1 +#define CONFIG_MPC5200 1 + +#define CFG_MPC5XXX_CLKIN 33000000 + +#define BOOTFLAG_COLD 0x01 +#define BOOTFLAG_WARM 0x02 + +#define CONFIG_MISC_INIT_R 1 + +#define CFG_CACHELINE_SIZE 32 +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CACHELINE_SHIFT 5 +#endif + +#define CONFIG_PSC_CONSOLE 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400} + +#define CONFIG_PCI 1 +#define CONFIG_PCI_PNP 1 +#undef CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 + +#define CONFIG_PCI_MEM_BUS 0x40000000 +#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS +#define CONFIG_PCI_MEM_SIZE 0x10000000 + +#define CONFIG_PCI_IO_BUS 0x50000000 +#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS +#define CONFIG_PCI_IO_SIZE 0x01000000 + +#define CFG_XLB_PIPELINING 1 +#define CONFIG_HIGH_BATS 1 + +#define MV_CI mvBlueCOUGAR-P +#define MV_VCI mvBlueCOUGAR-P +#define MV_FPGA_DATA 0xff860000 +#define MV_FPGA_SIZE 0x0003c886 +#define MV_KERNEL_ADDR 0xffc00000 +#define MV_INITRD_ADDR 0xff900000 +#define MV_INITRD_LENGTH 0x00300000 +#define MV_SCRATCH_ADDR 0x00000000 +#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH +#define MV_AUTOSCR_ADDR 0xff840000 +#define MV_AUTOSCR_ADDR2 0xff850000 +#define MV_DTB_ADDR 0xfffc0000 + +#define CONFIG_SHOW_BOOT_PROGRESS 1 + +#define MV_KERNEL_ADDR_RAM 0x00100000 +#define MV_DTB_ADDR_RAM 0x00600000 +#define MV_INITRD_ADDR_RAM 0x01000000 + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,5200@0" +#define OF_SOC "soc5200@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define MV_DTB_NAME mvbc-p.dtb +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +/* + * Supported commands + */ +#include + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_PCI +#define CONFIG_CMD_FPGA + +#undef CONFIG_WATCHDOG + +#define CONFIG_BOOTP_VENDOREX +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_NTPSERVER +#define CONFIG_BOOTP_RANDOM_DELAY +#define CONFIG_BOOTP_SEND_HOSTNAME + +/* + * Autoboot + */ +#define CONFIG_BOOTDELAY 2 +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_STOP_STR "s" +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_RESET_TO_RETRY 1000 + +#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ + then autoscr ${autoscr_addr}; \ + else autoscr ${autoscr_addr2}; \ + fi;" + +#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" +#define CONFIG_ENV_OVERWRITE + +#define XMK_STR(x) #x +#define MK_STR(x) XMK_STR(x) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console_nr=0\0" \ + "console=yes\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" \ + "fpga=0\0" \ + "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ + "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ + "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \ + "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \ + "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ + "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ + "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ + "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0" \ + "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0" \ + "mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0" \ + "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0" \ + "dtb_name=" MK_STR(MV_DTB_NAME) "\0" \ + "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0" \ + "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0" \ + "mv_version=" U_BOOT_VERSION "\0" \ + "dhcp_client_id=" MK_STR(MV_CI) "\0" \ + "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \ + "netretry=no\0" \ + "use_static_ipaddr=no\0" \ + "static_ipaddr=192.168.90.10\0" \ + "static_netmask=255.255.255.0\0" \ + "static_gateway=0.0.0.0\0" \ + "initrd_name=uInitrd.mvbc-p-rfs\0" \ + "zcip=no\0" \ + "netboot=yes\0" \ + "mvtest=Ff\0" \ + "tried_bootfromflash=no\0" \ + "tried_bootfromnet=no\0" \ + "use_dhcp=yes\0" \ + "gev_start=yes\0" \ + "mvbcdma_debug=0\0" \ + "mvbcia_debug=0\0" \ + "propdev_debug=0\0" \ + "gevss_debug=0\0" \ + "watchdog=1\0" \ + "" + +#undef XMK_STR +#undef MK_STR + +/* + * IPB Bus clocking configuration. + */ +#define CFG_IPBCLK_EQUALS_XLBCLK +#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 + +/* + * Flash configuration + */ +#undef CONFIG_FLASH_16BIT +#define CFG_FLASH_CFI +#define CFG_FLASH_CFI_DRIVER +#define CFG_FLASH_CFI_AMD_RESET 1 +#define CFG_FLASH_EMPTY_INFO + +#define CFG_FLASH_ERASE_TOUT 50000 +#define CFG_FLASH_WRITE_TOUT 1000 + +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 256 + +#define CFG_LOWBOOT +#define CFG_FLASH_BASE TEXT_BASE +#define CFG_FLASH_SIZE 0x00800000 + +/* + * Environment settings + */ +#define CFG_ENV_IS_IN_FLASH +#undef CFG_FLASH_PROTECTION + +#define CFG_ENV_ADDR 0xFFFE0000 +#define CFG_ENV_SIZE 0x10000 +#define CFG_ENV_SECT_SIZE 0x10000 +#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE) +#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE + +/* + * Memory map + */ +#define CFG_MBAR 0xF0000000 +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_DEFAULT_MBAR 0x80000000 + +#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM +#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE + +#define CFG_GBL_DATA_SIZE 128 +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +#define CFG_MONITOR_BASE TEXT_BASE +#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) +#define CFG_RAMBOOT 1 +#endif + +/* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */ +#define CFG_MONITOR_LEN (512 << 10) +#define CFG_MALLOC_LEN (512 << 10) +#define CFG_BOOTMAPSZ (8 << 20) + +/* + * Ethernet configuration + */ +#define CONFIG_NET_MULTI +#define CONFIG_NET_RETRY_COUNT 5 + +#define CONFIG_E1000 +#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0 +#undef CONFIG_MPC5xxx_FEC +#undef CONFIG_PHY_ADDR +#define CONFIG_NETDEV eth0 + +/* + * Miscellaneous configurable options + */ +#define CFG_HUSH_PARSER +#define CONFIG_CMDLINE_EDITING +#define CFG_PROMPT_HUSH_PS2 "> " +#undef CFG_LONGHELP +#define CFG_PROMPT "=> " +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 +#else +#define CFG_CBSIZE 256 +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CFG_MAXARGS 16 +#define CFG_BARGSIZE CFG_CBSIZE + +#define CFG_MEMTEST_START 0x00800000 +#define CFG_MEMTEST_END 0x02f00000 + +#define CFG_HZ 1000 + +/* default load address */ +#define CFG_LOAD_ADDR 0x02000000 +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 0x00200000 + +/* + * Various low-level settings + */ +#define CFG_GPS_PORT_CONFIG 0x20000004 + +#define CFG_HID0_INIT (HID0_ICE | HID0_ICFI) +#define CFG_HID0_FINAL HID0_ICE + +#define CFG_BOOTCS_START CFG_FLASH_BASE +#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE +#define CFG_BOOTCS_CFG 0x00047800 +#define CFG_CS0_START CFG_FLASH_BASE +#define CFG_CS0_SIZE CFG_FLASH_SIZE + +#define CFG_CS_BURST 0x000000f0 +#define CFG_CS_DEADCYCLE 0x33333303 + +#define CFG_RESET_ADDRESS 0x00000100 + +#undef FPGA_DEBUG +#undef CFG_FPGA_PROG_FEEDBACK +#define CONFIG_FPGA CFG_ALTERA_CYCLON2 +#define CONFIG_FPGA_ALTERA 1 +#define CONFIG_FPGA_CYCLON2 1 +#define CONFIG_FPGA_COUNT 1 + +#endif diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index a4581a3..5d11ef0 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -198,6 +198,35 @@ #define GPIO_PSC3_9 0x04000000UL #define GPIO_PSC1_4 0x01000000UL +#define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL +#define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_7 0x00002000UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_6 0x00001000UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_3 0x00000800UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_2 0x00000400UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_1 0x00000200UL +#define MPC5XXX_GPIO_SIMPLE_PSC3_0 0x00000100UL +#define MPC5XXX_GPIO_SIMPLE_PSC2_3 0x00000080UL +#define MPC5XXX_GPIO_SIMPLE_PSC2_2 0x00000040UL +#define MPC5XXX_GPIO_SIMPLE_PSC2_1 0x00000020UL +#define MPC5XXX_GPIO_SIMPLE_PSC2_0 0x00000010UL +#define MPC5XXX_GPIO_SIMPLE_PSC1_3 0x00000008UL +#define MPC5XXX_GPIO_SIMPLE_PSC1_2 0x00000004UL +#define MPC5XXX_GPIO_SIMPLE_PSC1_1 0x00000002UL +#define MPC5XXX_GPIO_SIMPLE_PSC1_0 0x00000001UL + +#define MPC5XXX_GPIO_SINT_PSC3_5 0x02 +#define MPC5XXX_GPIO_SINT_PSC3_4 0x01 + +#define MPC5XXX_GPIO_WKUP_7 0x80 +#define MPC5XXX_GPIO_WKUP_6 0x40 +#define MPC5XXX_GPIO_WKUP_PSC6_1 0x20 +#define MPC5XXX_GPIO_WKUP_PSC6_0 0x10 +#define MPC5XXX_GPIO_WKUP_ETH17 0x08 +#define MPC5XXX_GPIO_WKUP_PSC3_9 0x04 +#define MPC5XXX_GPIO_WKUP_PSC2_4 0x02 +#define MPC5XXX_GPIO_WKUP_PSC1_4 0x01 + /* PCI registers */ #define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04) #define MPC5XXX_PCI_CFG (MPC5XXX_PCI + 0x0c) -- cgit v1.1 From 1092fbd64748dfa2e979b102611ece9bc5ec1855 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 18 Jul 2008 10:42:29 +0200 Subject: ppc4xx: Enable 64bit printf format on 440/460 platforms This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all 440/460 platforms. This may be needed since those platforms support 36bit physical address space. Signed-off-by: Stefan Roese --- include/ppc4xx.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 0a8479f..1d06da8 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -46,6 +46,12 @@ #endif #if defined(CONFIG_440) +/* + * Enable long long (%ll ...) printf format on 440 PPC's since most of + * them support 36bit physical addressing + */ +#define CFG_64BIT_VSPRINTF +#define CFG_64BIT_STRTOUL #include #else #include -- cgit v1.1 From b2f44ba570f3a01113bbb745daf46f3858d22f53 Mon Sep 17 00:00:00 2001 From: Detlev Zundel Date: Wed, 16 Jul 2008 18:56:44 +0200 Subject: 83xx/85xx/86xx: Add LTEDR local bus definitions Signed-off-by: Detlev Zundel --- include/asm-ppc/fsl_lbc.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index c4af797..ea49ddc 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -298,4 +298,13 @@ #define LCRR_CLKDIV_4 0x00000004 #define LCRR_CLKDIV_8 0x00000008 +/* LTEDR - Transfer Error Check Disable Register + */ +#define LTEDR_BMD 0x80000000 /* Bus monitor disable */ +#define LTEDR_PARD 0x20000000 /* Parity error checking disabled */ +#define LTEDR_WPD 0x04000000 /* Write protect error checking diable */ +#define LTEDR_WARA 0x00800000 /* Write-after-read-atomic error checking diable */ +#define LTEDR_RAWA 0x00400000 /* Read-after-write-atomic error checking disable */ +#define LTEDR_CSD 0x00080000 /* Chip select error checking disable */ + #endif /* __ASM_PPC_FSL_LBC_H */ -- cgit v1.1