From c80ff560347820c5472bbd39e5b709df325cc6c8 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 13 Aug 2015 00:29:14 -0700 Subject: x86: Only include cbfs command for coreboot When running U-Boot bare-metal, the cbfs command is useless. Signed-off-by: Bin Meng --- include/configs/x86-common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 349b06c..3d07cc0 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -87,7 +87,9 @@ #define CONFIG_ISO_PARTITION /* Experimental */ #define CONFIG_CMD_PART +#ifdef CONFIG_SYS_COREBOOT #define CONFIG_CMD_CBFS +#endif #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE #define CONFIG_PARTITION_UUIDS -- cgit v1.1 From 3ff2f001c2289186c88edf55779078395987bb60 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 13 Aug 2015 00:29:15 -0700 Subject: x86: Enable CONFIG_PCI_CONFIG_HOST_BRIDGE for all boards It looks that x86 chipset always contains a host bridge at pci b.d.f 0.0.0, so enable this for all boards. Signed-off-by: Bin Meng --- include/configs/bayleybay.h | 1 - include/configs/crownbay.h | 1 - include/configs/minnowmax.h | 1 - include/configs/qemu-x86.h | 1 - include/configs/x86-common.h | 1 + 5 files changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index d37a865..1ba2998 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_ARCH_MISC_INIT -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 57a9512..162f08f 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -31,7 +31,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xe000 -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index aeb04b9..53d86a2 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -19,7 +19,6 @@ #define CONFIG_SMSC_LPC47M -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_PCI_PNP #define CONFIG_RTL8169 diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 72df64e..1b544c1 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -28,7 +28,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xe000 -#define CONFIG_PCI_CONFIG_HOST_BRIDGE #define CONFIG_PCI_PNP #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga\0" \ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 3d07cc0..217312e 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -192,6 +192,7 @@ * PCI configuration */ #define CONFIG_PCI +#define CONFIG_PCI_CONFIG_HOST_BRIDGE /*----------------------------------------------------------------------- * USB configuration -- cgit v1.1 From 153e1dda2ff62b0ecffa186a950bbfb82f1b474d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 13 Aug 2015 00:29:16 -0700 Subject: video: coreboot: Save VESA mode for future use When booting as a coreboot payload, the framebuffer details are passed from coreboot via configuration tables. We save these information into vesa_mode_info structure for future use. Signed-off-by: Bin Meng --- include/vbe.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/vbe.h b/include/vbe.h index 1a86db8..164ccae 100644 --- a/include/vbe.h +++ b/include/vbe.h @@ -102,6 +102,8 @@ struct vbe_ddc_info { #define VESA_SET_MODE 0x4f02 #define VESA_GET_CUR_MODE 0x4f03 +extern struct vbe_mode_info mode_info; + struct graphic_device; int vbe_get_video_info(struct graphic_device *gdev); -- cgit v1.1 From c78dfb4fd2cc8dbcd0baa3d180aeef1a06b1f062 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 21 Aug 2015 00:18:51 -0700 Subject: x86: superio: Add keyboard controller support to smsc_lpc47m driver Add an api to enable and configure the integrated keyboard controller on SMSC LPC47m superio chipset. It also adds several macros to help future extension. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/smsc_lpc47m.h | 29 +++++++++++++++++++++++++---- 1 file changed, 25 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/smsc_lpc47m.h b/include/smsc_lpc47m.h index 32b069d..419643f 100644 --- a/include/smsc_lpc47m.h +++ b/include/smsc_lpc47m.h @@ -7,14 +7,35 @@ #ifndef _SMSC_LPC47M_H_ #define _SMSC_LPC47M_H_ +/* I/O address of LPC47M */ +#define LPC47M_IO_PORT 0x2e + +/* Logical device number */ +#define LPC47M_FDC 0 /* Floppy */ +#define LPC47M_SP2 2 /* Serial Port 2 */ +#define LPC47M_PP 3 /* Parallel Port */ +#define LPC47M_SP1 4 /* Serial Port 1 */ +#define LPC47M_KBC 7 /* Keyboard & Mouse */ +#define LPC47M_PME 10 /* Power Control */ + /** * Configure the base I/O port of the specified serial device and enable the * serial device. * - * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number. - * @iobase: Processor I/O port address to assign to this serial device. - * @irq: Processor IRQ number to assign to this serial device. + * @dev: high 8 bits = super I/O port, low 8 bits = logical device number + * @iobase: processor I/O port address to assign to this serial device + * @irq: processor IRQ number to assign to this serial device + */ +void lpc47m_enable_serial(uint dev, uint iobase, uint irq); + +/** + * Configure the specified keyboard controller device and enable the keyboard + * controller device. + * + * @dev: high 8 bits = Super I/O port, low 8 bits = logical device number + * @irq0: processor IRQ number to assign to keyboard + * @irq1: processor IRQ number to assign to mouse */ -void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq); +void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1); #endif /* _SMSC_LPC47M_H_ */ -- cgit v1.1 From dc5740df7e5c95adbad0cd77de5e6e5eb40b469f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 22 Aug 2015 15:58:55 -0600 Subject: dm: pci: Add a comment to help find pci_hose_read_config_byte, etc. These functions are defined by macros so do not show up with grep. Add a comment to help. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index 488ff44..e24c970 100644 --- a/include/pci.h +++ b/include/pci.h @@ -653,6 +653,7 @@ extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose, #define pci_io_to_virt(dev, addr, len, map_flags) \ pci_bus_to_virt((dev), (addr), PCI_REGION_IO, (len), (map_flags)) +/* For driver model these are defined in macros in pci_compat.c */ extern int pci_hose_read_config_byte(struct pci_controller *hose, pci_dev_t dev, int where, u8 *val); extern int pci_hose_read_config_word(struct pci_controller *hose, -- cgit v1.1 From 835dd000503591d8eb59a191f7220768898737b3 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Mon, 24 Aug 2015 01:00:05 -0700 Subject: x86: i8042: Clean up the driver per coding convention - Rename CamelCase variables to conform U-Boot coding convention - Rename wait_until_kbd_output_full() to kbd_output_full() - Change to use macros for i8042 command and control register bits Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/i8042.h | 103 ++++++++++++++++++++++++++++++++------------------------ 1 file changed, 59 insertions(+), 44 deletions(-) (limited to 'include') diff --git a/include/i8042.h b/include/i8042.h index 58c85ec..e0afce1 100644 --- a/include/i8042.h +++ b/include/i8042.h @@ -10,52 +10,67 @@ #ifndef _I8042_H_ #define _I8042_H_ -#ifdef __I386__ -#include -#include -#define in8(p) inb(p) -#define out8(p,v) outb(v,p) -#endif - /* defines */ -#define I8042_DATA_REG (CONFIG_SYS_ISA_IO + 0x0060) /* keyboard i/o buffer */ -#define I8042_STATUS_REG (CONFIG_SYS_ISA_IO + 0x0064) /* keyboard status read */ -#define I8042_COMMAND_REG (CONFIG_SYS_ISA_IO + 0x0064) /* keyboard ctrl write */ - -enum { - /* Output register (I8042_DATA_REG) has data for system */ - I8042_STATUS_OUT_DATA = 1 << 0, - I8042_STATUS_IN_DATA = 1 << 1, -}; - -#define KBD_US 0 /* default US layout */ -#define KBD_GER 1 /* german layout */ - -#define KBD_TIMEOUT 1000 /* 1 sec */ -#define KBD_RESET_TRIES 3 - -#define AS 0 /* normal character index */ -#define SH 1 /* shift index */ -#define CN 2 /* control index */ -#define NM 3 /* numeric lock index */ -#define AK 4 /* right alt key */ -#define CP 5 /* capslock index */ -#define ST 6 /* stop output index */ -#define EX 7 /* extended code index */ -#define ES 8 /* escape and extended code index */ - -#define NORMAL 0x0000 /* normal key */ -#define STP 0x0001 /* scroll lock stop output*/ -#define NUM 0x0002 /* numeric lock */ -#define CAPS 0x0004 /* capslock */ -#define SHIFT 0x0008 /* shift */ -#define CTRL 0x0010 /* control*/ -#define EXT 0x0020 /* extended scan code 0xe0 */ -#define ESC 0x0040 /* escape key press */ -#define E1 0x0080 /* extended scan code 0xe1 */ -#define BRK 0x0100 /* make break flag for keyboard */ -#define ALT 0x0200 /* right alt */ +#define I8042_DATA_REG 0x60 /* keyboard i/o buffer */ +#define I8042_STS_REG 0x64 /* keyboard status read */ +#define I8042_CMD_REG 0x64 /* keyboard ctrl write */ + +/* Status register bit defines */ +#define STATUS_OBF (1 << 0) +#define STATUS_IBF (1 << 1) + +/* Configuration byte bit defines */ +#define CONFIG_KIRQ_EN (1 << 0) +#define CONFIG_MIRQ_EN (1 << 1) +#define CONFIG_SET_BIST (1 << 2) +#define CONFIG_KCLK_DIS (1 << 4) +#define CONFIG_MCLK_DIS (1 << 5) +#define CONFIG_AT_TRANS (1 << 6) + +/* i8042 commands */ +#define CMD_RD_CONFIG 0x20 /* read configuration byte */ +#define CMD_WR_CONFIG 0x60 /* write configuration byte */ +#define CMD_SELF_TEST 0xaa /* controller self-test */ +#define CMD_KBD_DIS 0xad /* keyboard disable */ +#define CMD_KBD_EN 0xae /* keyboard enable */ +#define CMD_SET_KBD_LED 0xed /* set keyboard led */ +#define CMD_RESET_KBD 0xff /* reset keyboard */ + +/* i8042 command result */ +#define KBC_TEST_OK 0x55 +#define KBD_ACK 0xfa +#define KBD_POR 0xaa + +/* keyboard scan codes */ + +#define KBD_US 0 /* default US layout */ +#define KBD_GER 1 /* german layout */ + +#define KBD_TIMEOUT 1000 /* 1 sec */ +#define KBD_RESET_TRIES 3 + +#define AS 0 /* normal character index */ +#define SH 1 /* shift index */ +#define CN 2 /* control index */ +#define NM 3 /* numeric lock index */ +#define AK 4 /* right alt key */ +#define CP 5 /* capslock index */ +#define ST 6 /* stop output index */ +#define EX 7 /* extended code index */ +#define ES 8 /* escape and extended code index */ + +#define NORMAL 0x0000 /* normal key */ +#define STP 0x0001 /* scroll lock stop output*/ +#define NUM 0x0002 /* numeric lock */ +#define CAPS 0x0004 /* capslock */ +#define SHIFT 0x0008 /* shift */ +#define CTRL 0x0010 /* control*/ +#define EXT 0x0020 /* extended scan code 0xe0 */ +#define ESC 0x0040 /* escape key press */ +#define E1 0x0080 /* extended scan code 0xe1 */ +#define BRK 0x0100 /* make break flag for keyboard */ +#define ALT 0x0200 /* right alt */ /* exports */ -- cgit v1.1 From 4dd02a752c714e1616025fceba78e121807cfc11 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Mon, 24 Aug 2015 01:00:08 -0700 Subject: x86: crownbay: Enable on-board SMSC superio keyboard controller So far we only enabled one legacy serial port on the SMSC LPC47m superio chipset on Intel Crown Bay board. As the board also has dual PS/2 ports routed out, enable the keyboard controller which is i8042 compatible so that we can use PS/2 keyboard and mouse. In order to make PS/2 keyboard work with the VGA console, remove CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode using PIRQ routing table, adjust the mask in the device tree to reserve irq12 which is used by PS/2 mouse. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- include/configs/crownbay.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 162f08f..998da78 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -53,9 +53,6 @@ #define CONFIG_PCH_GBE #define CONFIG_PHYLIB -/* TunnelCreek IGD support */ -#define CONFIG_VGA_AS_SINGLE_DEVICE - /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0 -- cgit v1.1