From 77c1458d130d33704472db9c88d2310c8fc90f4c Mon Sep 17 00:00:00 2001 From: Dipen Dudhat Date: Mon, 5 Oct 2009 15:41:58 +0530 Subject: ppc/85xx: PIO Support for FSL eSDHC Controller Driver On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat --- include/fsl_esdhc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index f9ae15a..477bbd7 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -90,6 +90,7 @@ #define PRSSTAT_CDPL (0x00040000) #define PRSSTAT_CINS (0x00010000) #define PRSSTAT_BREN (0x00000800) +#define PRSSTAT_BWEN (0x00000400) #define PRSSTAT_DLA (0x00000004) #define PRSSTAT_CICHB (0x00000002) #define PRSSTAT_CIDHB (0x00000001) @@ -121,6 +122,7 @@ #define XFERTYP_DMAEN 0x00000001 #define CINS_TIMEOUT 1000 +#define PIO_TIMEOUT 100000 #define DSADDR 0x2e004 -- cgit v1.1