From 682011ff6968198da14b89e40d9f55b00f6d91f7 Mon Sep 17 00:00:00 2001 From: wdenk Date: Tue, 3 Jun 2003 23:54:09 +0000 Subject: * Patches by Udi Finkelstein, 2 June 2003: - Added support for custom keyboards, initialized by defining a board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD . - Added support for the RBC823 board. - cpu/mpc8xx/lcd.c now automatically calculates the Horizontal Pixel Count field. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * Fix alignment problem in BOOTP (dhcp_leasetime option) [pointed out by Nicolas Lacressonnière, 2 Jun 2003] * Patch by Mark Rakes, 14 May 2003: add support for Intel e1000 gig cards. * Patch by Nye Liu, 3 Jun 2003: fix critical typo in MAMR definition (include/mpc8xx.h) * Fix requirement to align U-Boot image on 16 kB boundaries on PPC. * Patch by Klaus Heydeck, 2 Jun 2003 Minor changes for KUP4K configuration --- include/commproc.h | 1 + include/configs/FADS823.h | 2 +- include/configs/GENIETV.h | 2 +- include/configs/KUP4K.h | 56 ++++--- include/configs/RBC823.h | 418 ++++++++++++++++++++++++++++++++++++++++++++++ include/devices.h | 4 +- include/lcd.h | 6 + include/mpc8xx.h | 144 ++++++++-------- include/pci_ids.h | 13 ++ include/status_led.h | 19 +++ 10 files changed, 563 insertions(+), 102 deletions(-) create mode 100644 include/configs/RBC823.h (limited to 'include') diff --git a/include/commproc.h b/include/commproc.h index e9b0ab7..d6cf9ba 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -1331,6 +1331,7 @@ typedef struct scc_enet { #if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \ defined(CONFIG_R360MPI) || \ + defined(CONFIG_RBC823) || \ defined(CONFIG_TQM823L) || \ defined(CONFIG_TQM850L) || \ defined(CONFIG_ETX094) || \ diff --git a/include/configs/FADS823.h b/include/configs/FADS823.h index 58d33c7..acb2eed 100644 --- a/include/configs/FADS823.h +++ b/include/configs/FADS823.h @@ -58,7 +58,7 @@ /* Wireless 56Khz 4PPM keyboard on SMCx */ -/*#define CONFIG_WL_4PPM_KEYBOARD 1 */ +/*#define CONFIG_KEYBOARD 1 */ #define CONFIG_WL_4PPM_KEYBOARD_SMC 0 /* SMC to use (0 indexed) */ /* diff --git a/include/configs/GENIETV.h b/include/configs/GENIETV.h index 99e2cfc..ef2cb3a 100644 --- a/include/configs/GENIETV.h +++ b/include/configs/GENIETV.h @@ -63,7 +63,7 @@ /* Wireless 56Khz 4PPM keyboard on SMCx */ -/*#define CONFIG_WL_4PPM_KEYBOARD 0 */ +/*#define CONFIG_KEYBOARD 0 */ /*#define CONFIG_WL_4PPM_KEYBOARD_SMC 0 / SMC to use (0 indexed) */ /* diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index f68f1e1..b924b9c 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -41,39 +41,41 @@ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE -#define CONFIG_BAUDRATE 9600 /* console baudrate */ +#define CONFIG_BAUDRATE 115200 /* console baudrate */ #if 0 #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else -#define CONFIG_BOOTDELAY 5 /* autoboot after 1 second */ +#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */ #endif #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ #define CONFIG_BOARD_TYPES 1 /* support board types */ -#if 0 -#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo" -#endif #undef CONFIG_BOOTARGS -#define CONFIG_NFSBOOTCOMMAND \ - "dhcp ;"\ - "setenv bootargs root=/dev/nfs ro nfsroot=$(nfsip):$(rootpath) "\ - "ip=$(ipaddr):$(nfsip):$(gatewayip):"\ - "$(netmask):heydeck.eva:eth0:off; "\ - "bootm 100000" -#define CONFIG_RAMBOOTCOMMAND \ - "diskboot 100000 0:1; "\ - "setenv bootargs root=/dev/hda2 panic=1 "\ - "ip=192.168.0.71:192.168.0.100:192.168.0.2:255.255.255.0; "\ - "bootm" +#define CONFIG_EXTRA_ENV_SETTINGS \ +"slot_a_boot=setenv bootargs root=/dev/hda2 ip=off panic=1;\ + diskboot 200000 0:1; bootm 200000\0" \ +"slot_b_boot=setenv bootargs root=/dev/hda2 ip=off panic=1;\ + diskboot 200000 2:1; bootm 200000\0" \ +"nfs_boot=dhcp; run nfsargs addip; bootm 200000\0" \ +"panic_boot=echo No Bootdevice !!! reset\0" \ +"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsip):$(rootpath)\0" \ +"ramargs=setenv bootargs root=/dev/ram rw\0" \ +"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsip):$(gatewayip)\ +:$(netmask):$(hostname):$(netdev):off panic=1\0" \ +"netdev=eth0\0" \ +"load=tftp 200000 bootloader.bitmap;tftp 100000 u-boot.bin\0" \ +"update=protect off 1:0-8;era 1:0-8;cp.b 100000 40000000 $(filesize);\ +cp.b 200000 40040000 14000\0" \ +"nfsip=192.168.2.19\0" + +#define CONFIG_BOOTCOMMAND \ + "run slot_a_boot;run slot_b_boot;run nfs_boot;run panic_boot" -#define CONFIG_BOOTCOMMAND \ - "run ramboot "\ - "run nfsboot" #define CONFIG_MISC_INIT_R 1 @@ -124,12 +126,14 @@ #define CFG_MEMTEST_START 0x0400000 /* memtest works on */ #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ -#define CFG_LOAD_ADDR 0x100000 /* default load address */ +#define CFG_LOAD_ADDR 0x200000 /* default load address */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CFG_CONSOLE_INFO_QUIET 1 + /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) @@ -250,7 +254,7 @@ * * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)! */ -#define CFG_PLPRCR ( (3-1)< + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ + +#define CFG_LOAD_ADDR 0x0100000 /* default load address */ + +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ + +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/*----------------------------------------------------------------------- + * Internal Memory Mapped Register + */ +#define CFG_IMMR 0xFF000000 + +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR CFG_IMMR +#define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */ +#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_FLASH_BASE 0xFFF00000 +#if defined(DEBUG) +#define CFG_MONITOR_LEN (384 << 10) /* Reserve 256 kB for Monitor */ +#else +#define CFG_MONITOR_LEN (384 << 10) /* Reserve 192 kB for Monitor */ +#endif +#define CFG_MONITOR_BASE CFG_FLASH_BASE +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */ + +#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_OFFSET 0x10000 /* Offset of Environment Sector */ +#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ +#endif + +/*----------------------------------------------------------------------- + * SYPCR - System Protection Control 11-9 + * SYPCR can only be written once after reset! + *----------------------------------------------------------------------- + * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze + */ +#if defined(CONFIG_WATCHDOG) +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ + SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) +#else +/* +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) +*/ +#define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWRI | SYPCR_SWP) +#endif + +/*----------------------------------------------------------------------- + * SIUMCR - SIU Module Configuration 11-6 + *----------------------------------------------------------------------- + * PCMCIA config., multi-function pin tri-state + */ +#define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC00 | SIUMCR_FRC) + +/*----------------------------------------------------------------------- + * TBSCR - Time Base Status and Control 11-26 + *----------------------------------------------------------------------- + * Clear Reference Interrupt Status, Timebase freezing enabled + */ +#define CFG_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) + +/*----------------------------------------------------------------------- + * RTCSC - Real-Time Clock Status and Control Register 11-27 + *----------------------------------------------------------------------- + */ +#define CFG_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) + +/*----------------------------------------------------------------------- + * PISCR - Periodic Interrupt Status and Control 11-31 + *----------------------------------------------------------------------- + * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled + */ +#define CFG_PISCR (PISCR_PS | PISCR_PITF) + +/*----------------------------------------------------------------------- + * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 + *----------------------------------------------------------------------- + * Reset PLL lock status sticky bit, timer expired status bit and timer + * interrupt status bit + * + */ + +/* + * for 48 MHz, we use a 4 MHz clock * 12 + */ +#define CFG_PLPRCR \ + ( (12-1)<> (slot << 4)) #define PCMCIA_VS2(slot) (0x40000000 >> (slot << 4)) -#define PCMCIA_VS_MASK(slot) (0xc0000000 >> (slot << 4)) +#define PCMCIA_VS_MASK(slot) (0xC0000000 >> (slot << 4)) #define PCMCIA_VS_SHIFT(slot) (30 - (slot << 4)) #define PCMCIA_WP(slot) (0x20000000 >> (slot << 4)) diff --git a/include/pci_ids.h b/include/pci_ids.h index f4fc52f..2ea4894 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -1367,6 +1367,19 @@ #define PCI_DEVICE_ID_INTEL_82430 0x0486 #define PCI_DEVICE_ID_INTEL_82434 0x04a3 #define PCI_DEVICE_ID_INTEL_I960 0x0960 +#define PCI_DEVICE_ID_INTEL_82542 0x1000 +#define PCI_DEVICE_ID_INTEL_82543GC_FIBER 0x1001 +#define PCI_DEVICE_ID_INTEL_82543GC_COPPER 0x1004 +#define PCI_DEVICE_ID_INTEL_82544EI_COPPER 0x1008 +#define PCI_DEVICE_ID_INTEL_82544EI_FIBER 0x1009 +#define PCI_DEVICE_ID_INTEL_82544GC_COPPER 0x100C +#define PCI_DEVICE_ID_INTEL_82544GC_LOM 0x100D +#define PCI_DEVICE_ID_INTEL_82540EM 0x100E +#define PCI_DEVICE_ID_INTEL_82545EM_COPPER 0x100F +#define PCI_DEVICE_ID_INTEL_82546EB_COPPER 0x1010 +#define PCI_DEVICE_ID_INTEL_82545EM_FIBER 0x1011 +#define PCI_DEVICE_ID_INTEL_82546EB_FIBER 0x1012 +#define PCI_DEVICE_ID_INTEL_82540EM_LOM 0x1015 #define PCI_DEVICE_ID_INTEL_82559 0x1030 #define PCI_DEVICE_ID_INTEL_82559ER 0x1209 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 diff --git a/include/status_led.h b/include/status_led.h index 0d5a56e..c1fb7f3 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -296,6 +296,25 @@ void status_led_set (int led, int state); # define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ +/***** RBC823 ********************************************************/ +#elif defined(CONFIG_RBC823) + +# define STATUS_LED_PAR im_ioport.iop_pcpar +# define STATUS_LED_DIR im_ioport.iop_pcdir +# undef STATUS_LED_ODR +# define STATUS_LED_DAT im_ioport.iop_pcdat + +# define STATUS_LED_BIT 0x0002 /* LED 0 is on PC.14 */ +# define STATUS_LED_PERIOD (CFG_HZ / 2) +# define STATUS_LED_STATE STATUS_LED_BLINKING +# define STATUS_LED_BIT1 0x0004 /* LED 1 is on PC.13 */ +# define STATUS_LED_PERIOD1 (CFG_HZ) +# define STATUS_LED_STATE1 STATUS_LED_OFF + +# define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */ + +# define STATUS_LED_BOOT 0 /* LED 0 used for boot status */ + /************************************************************************/ #else # error Status LED configuration missing -- cgit v1.1