From 5bdce30396c47cdfdac66cee19b28ff0bfafc038 Mon Sep 17 00:00:00 2001 From: Adrian Alonso Date: Wed, 6 May 2015 14:19:39 -0500 Subject: MLK-10839: arm: imx: mx7d 19x19 lpddr3 arm2 board support * Add mx7d_19x19_lpddr3_arm2 target board supprt * Enable i2c, spinor, usb, usdhc, qspi, enet, uart * Build targets mx7d_19x19_lpddr3_arm2_defconfig mx7d_19x19_lpddr3_arm2_eimnor_defconfig - Set EIMNOR settings for Intel Sibley Asynchronous mode - Set flash sector size for 256kb (erase block size) Signed-off-by: Adrian Alonso Signed-off-by: Ye.Li --- include/configs/mx7d_19x19_lpddr3_arm2.h | 83 ++++++++++++++++++++++++++++++++ include/configs/mx7d_arm2.h | 4 +- 2 files changed, 85 insertions(+), 2 deletions(-) create mode 100644 include/configs/mx7d_19x19_lpddr3_arm2.h (limited to 'include') diff --git a/include/configs/mx7d_19x19_lpddr3_arm2.h b/include/configs/mx7d_19x19_lpddr3_arm2.h new file mode 100644 index 0000000..67244a8 --- /dev/null +++ b/include/configs/mx7d_19x19_lpddr3_arm2.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX7D 19x19 LPDDR3 ARM2 board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX7D_19X19_LPDDR3_ARM2_CONFIG_H +#define __MX7D_19X19_LPDDR3_ARM2_CONFIG_H + +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ + +#define PHYS_SDRAM_SIZE SZ_2G + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +/* ENET2 */ +#define IMX_FEC_BASE ENET2_IPS_BASE_ADDR +#define CONFIG_FEC_MXC_MDIO_BASE ENET_IPS_BASE_ADDR + +/* QSPI conflict with EIMNOR */ +/* FEC0 conflict with EIMNOR */ +/* ECSPI conflict with UART */ +#ifdef CONFIG_SYS_BOOT_QSPI +#define CONFIG_SYS_USE_QSPI +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_SPINOR +#define CONFIG_SYS_USE_SPINOR +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_EIMNOR +#define CONFIG_SYS_USE_EIMNOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_FEC_MXC +#elif defined CONFIG_SYS_BOOT_NAND +#define CONFIG_SYS_USE_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_ENV_IS_IN_MMC +#endif + +/* I2C configs */ +#define CONFIG_CMD_I2C +#ifdef CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +/* PMIC */ +#define CONFIG_PFUZE3000_PMIC_I2C +#ifdef CONFIG_PFUZE3000_PMIC_I2C +#define CONFIG_PMIC_I2C_BUS 0 +#define CONFIG_PMIC_I2C_SLAVE 0x8 +#endif +#endif + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#define CONFIG_SF_DEFAULT_CS 0 +#endif + +#include "mx7d_arm2.h" + +#endif diff --git a/include/configs/mx7d_arm2.h b/include/configs/mx7d_arm2.h index b476e5b..3121dd8 100644 --- a/include/configs/mx7d_arm2.h +++ b/include/configs/mx7d_arm2.h @@ -279,9 +279,9 @@ #ifdef CONFIG_SYS_USE_EIMNOR #undef CONFIG_SYS_NO_FLASH #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) +#define CONFIG_SYS_FLASH_SECT_SIZE (256 * 1024) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ -- cgit v1.1