From 4af34177b657e91263919a307fd0b0865a299e52 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 16 Aug 2009 23:40:13 +0200 Subject: Monahans: avoid floating point calculations Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz) which caused floating point operations to be used. This resulted in unresolved references to some FP related libgcc functions when using U-Boot's private libgcc functions. Change the code to use fixed point math only. Signed-off-by: Wolfgang Denk --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index f34af19..a25d4c5 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1094,7 +1094,7 @@ typedef void (*ExcpHndlr) (void) ; #define OMCR10 __REG(0x40A000D8) /* OS Match Control Register 10 */ #define OMCR11 __REG(0x40A000DC) /* OS Match Control Register 11 */ -#define OSCR_CLK_FREQ 3.250 /* MHz */ +#define OSCR_CLK_FREQ 3250 /* kHz = 3.25 MHz */ #endif /* CONFIG_CPU_MONAHANS */ #define OSSR_M4 (1 << 4) /* Match status channel 4 */ -- cgit v1.1