From 3d657a05a9cba0415fa028ac3d5acc5ec883bf00 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Enric=20Balletb=C3=B2=20i=20Serra?= Date: Fri, 6 Dec 2013 21:30:19 +0100 Subject: ARM: OMAP5: Rename to ti_omap5_common.h Follow the pattern ti__common.h used by other TI processors to be coherent. So just rename omap5_common.h to ti_omap5_common.h. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Lokesh Vutla --- include/configs/dra7xx_evm.h | 4 +- include/configs/omap5_common.h | 149 -------------------------------------- include/configs/omap5_uevm.h | 4 +- include/configs/ti_omap5_common.h | 149 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 153 insertions(+), 153 deletions(-) delete mode 100644 include/configs/omap5_common.h create mode 100644 include/configs/ti_omap5_common.h (limited to 'include') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f210ed8..04ae3ca 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -4,7 +4,7 @@ * Lokesh Vutla * * Configuration settings for the TI DRA7XX board. - * See omap5_common.h for omap5 common settings. + * See ti_omap5_common.h for omap5 common settings. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -34,7 +34,7 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK -#include +#include /* CPSW Ethernet */ #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h deleted file mode 100644 index c7fa37e..0000000 --- a/include/configs/omap5_common.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * (C) Copyright 2013 - * Texas Instruments Incorporated. - * Sricharan R - * - * Derived from OMAP4 done by: - * Aneesh V - * - * TI OMAP5 AND DRA7XX common configuration settings - * - * SPDX-License-Identifier: GPL-2.0+ - * - * For more details, please see the technical documents listed at - * http://www.ti.com/product/omap5432 - */ - -#ifndef __CONFIG_OMAP5_COMMON_H -#define __CONFIG_OMAP5_COMMON_H - -#define CONFIG_OMAP54XX -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_MISC_INIT_R -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -/* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE - -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PALMAS_POWER -#endif - -#include -#include - -#define CONFIG_ENV_SIZE (128 << 10) - -#include - -/* - * Hardware drivers - */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK 48000000 - -/* Per-SoC commands */ -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - -/* - * Environment setup - */ -#ifndef PARTS_DEFAULT -#define PARTS_DEFAULT -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80200000\0" \ - "fdtaddr=0x80F80000\0" \ - "fdt_high=0xffffffff\0" \ - "rdaddr=0x81000000\0" \ - "console=" CONSOLEDEV ",115200n8\0" \ - "fdtfile=undefined\0" \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ - "usbtty=cdc_acm\0" \ - "vram=16M\0" \ - "partitions=" PARTS_DEFAULT "\0" \ - "optargs=\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk1p2 rw\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "vram=${vram} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ - "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ - "source ${loadaddr}\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ - "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ - "env import -t ${loadaddr} ${filesize}\0" \ - "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "mmcboot=mmc dev ${mmcdev}; " \ - "if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadimage; then " \ - "run loadfdt; " \ - "echo Booting from mmc${mmcdev} ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${fdtaddr}; " \ - "fi;" \ - "fi;\0" \ - "findfdt="\ - "if test $board_name = omap5_uevm; then " \ - "setenv fdtfile omap5-uevm.dtb; fi; " \ - "if test $board_name = dra7xx; then " \ - "setenv fdtfile dra7-evm.dtb; fi;" \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree to use; fi; \0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ - -#define CONFIG_BOOTCOMMAND \ - "run findfdt; " \ - "run mmcboot;" \ - "setenv mmcdev 1; " \ - "setenv bootpart 1:2; " \ - "setenv mmcroot /dev/mmcblk0p2 rw; " \ - "run mmcboot;" \ - - -/* - * SPL related defines. The Public RAM memory map the ROM defines the - * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 - * (dra7xx is larger, but we do not need to be larger at this time). We - * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and - * print some information. - */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 -#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_DISPLAY_PRINT -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" - -#endif /* __CONFIG_OMAP5_COMMON_H */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 76c5106..51dff23 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -4,7 +4,7 @@ * Sricharan R * * Configuration settings for the TI EVM5430 board. - * See omap5_common.h for omap5 common settings. + * See ti_omap5_common.h for omap5 common settings. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -17,7 +17,7 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" -#include +#include #define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 UART3_BASE diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h new file mode 100644 index 0000000..4f34dcf --- /dev/null +++ b/include/configs/ti_omap5_common.h @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated. + * Sricharan R + * + * Derived from OMAP4 done by: + * Aneesh V + * + * TI OMAP5 AND DRA7XX common configuration settings + * + * SPDX-License-Identifier: GPL-2.0+ + * + * For more details, please see the technical documents listed at + * http://www.ti.com/product/omap5432 + */ + +#ifndef __CONFIG_TI_OMAP5_COMMON_H +#define __CONFIG_TI_OMAP5_COMMON_H + +#define CONFIG_OMAP54XX +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_MISC_INIT_R +#define CONFIG_ARCH_CPU_INIT + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* Use General purpose timer 1 */ +#define CONFIG_SYS_TIMERBASE GPT2_BASE + +/* + * For the DDR timing information we can either dynamically determine + * the timings to use or use pre-determined timings (based on using the + * dynamic method. Default to the static timing infomation. + */ +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS +#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION +#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS +#endif + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PALMAS_POWER +#endif + +#include +#include + +#define CONFIG_ENV_SIZE (128 << 10) + +#include + +/* + * Hardware drivers + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 + +/* Per-SoC commands */ +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* + * Environment setup + */ +#ifndef PARTS_DEFAULT +#define PARTS_DEFAULT +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x80200000\0" \ + "fdtaddr=0x80F80000\0" \ + "fdt_high=0xffffffff\0" \ + "rdaddr=0x81000000\0" \ + "console=" CONSOLEDEV ",115200n8\0" \ + "fdtfile=undefined\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "usbtty=cdc_acm\0" \ + "vram=16M\0" \ + "partitions=" PARTS_DEFAULT "\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk1p2 rw\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "vram=${vram} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run loadfdt; " \ + "echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr}; " \ + "fi;" \ + "fi;\0" \ + "findfdt="\ + "if test $board_name = omap5_uevm; then " \ + "setenv fdtfile omap5-uevm.dtb; fi; " \ + "if test $board_name = dra7xx; then " \ + "setenv fdtfile dra7-evm.dtb; fi;" \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine device tree to use; fi; \0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ + +#define CONFIG_BOOTCOMMAND \ + "run findfdt; " \ + "run mmcboot;" \ + "setenv mmcdev 1; " \ + "setenv bootpart 1:2; " \ + "setenv mmcroot /dev/mmcblk0p2 rw; " \ + "run mmcboot;" \ + + +/* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 + * (dra7xx is larger, but we do not need to be larger at this time). We + * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and + * print some information. + */ +#define CONFIG_SPL_TEXT_BASE 0x40300000 +#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) +#define CONFIG_SPL_DISPLAY_PRINT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +#endif /* __CONFIG_TI_OMAP5_COMMON_H */ -- cgit v1.1