From af2536088e2feae2cf1274f48376e3310e0f709e Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Fri, 18 May 2012 06:04:17 +0000 Subject: powerpc/p1022ds: add support for SPI and SD boot Add TLB mappings, board target options, and configuration items need for SPI/SD boot. Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit address flash, therefore, when SDHC/ESPI booting and access to eLBC, the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to 00b for them. Configure the PX_BRDCFG0[0~1] to 10b which is connected to SPI devices as SPI_CS(0:3)_B. Signed-off-by: Matthew McClintock Signed-off-by: Jerry Huang Signed-off-by: Jiang Yutang Signed-off-by: Andy Fleming --- include/configs/P1022DS.h | 51 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 48 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 50d3f8d..86217a4 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -18,6 +18,22 @@ #define CONFIG_PHYS_64BIT #endif +#ifdef CONFIG_SDCARD +#define CONFIG_RAMBOOT_SDCARD +#define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_SYS_TEXT_BASE 0x11000000 +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#endif + +#ifdef CONFIG_SPIFLASH +#define CONFIG_RAMBOOT_SPIFLASH +#define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_SYS_TEXT_BASE 0x11000000 +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ @@ -402,11 +418,40 @@ /* * Environment */ +#ifdef CONFIG_SYS_RAMBOOT +#ifdef CONFIG_RAMBOOT_SPIFLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_RAMBOOT_SDCARD) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_NAND_U_BOOT) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) +#else +#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) +#define CONFIG_ENV_SIZE 0x2000 +#endif +#else #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_OVERWRITE -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 +#define CONFIG_ENV_ADDR 0xfff80000 +#else +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#endif #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ +#endif #define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE -- cgit v1.1 From 0f57f6a3fe26a9c2d69b34e9caf8f83082d77636 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Thu, 28 Jun 2012 23:35:34 +0000 Subject: powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined ENV location compile logic is wrong, and when CONFIG_SYS_NO_FLASH is defined and non-NOR u-boot is building, it will cause compile error. Also, add CONFIG_SYS_FLASH_USE_BUFFER_WRITE for p2041, which will improve NOR flash write performance. Signed-off-by: Shaohui Xie Signed-off-by: Andy Fleming --- include/configs/P2041RDB.h | 5 +++++ include/configs/corenet_ds.h | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 1251b5c..1c0eb74 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -73,10 +73,13 @@ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH +#ifndef CONFIG_RAMBOOT_PBL #define CONFIG_ENV_IS_NOWHERE +#endif #else #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #endif #if defined(CONFIG_SPIFLASH) @@ -101,6 +104,8 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_ENV_IS_NOWHERE) + #define CONFIG_ENV_SIZE 0x2000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 52a5ba9..5f66212 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -77,7 +77,7 @@ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH -#ifndef CONFIG_SRIOBOOT_SLAVE +#if !defined(CONFIG_SRIOBOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL) #define CONFIG_ENV_IS_NOWHERE #endif #else -- cgit v1.1 From 7ee411071f31c856107e6b29fcd8df53ae4d7349 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Fri, 6 Jul 2012 07:39:26 +0000 Subject: powerpc/85xx: improve definition of BR_PHYS_ADDR macro The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro definition, so callers had to supply their own parenthesis. Signed-off-by: Timur Tabi Signed-off-by: Andy Fleming --- include/configs/MPC8536DS.h | 9 ++++----- include/configs/MPC8548CDS.h | 3 +-- include/configs/MPC8572DS.h | 9 ++++----- include/configs/P1022DS.h | 2 +- include/configs/P2020DS.h | 9 +++++---- include/configs/corenet_ds.h | 2 +- include/configs/p1_p2_rdb_pc.h | 4 ++-- 7 files changed, 18 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 33ded71..ceed5ea 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -217,8 +217,7 @@ #endif #define CONFIG_FLASH_BR_PRELIM \ - (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) \ - | BR_PS_16 | BR_V) + (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM 0xf8000ff7 #define CONFIG_SYS_BR1_PRELIM \ @@ -380,14 +379,14 @@ #endif #define CONFIG_SYS_BR4_PRELIM \ - (BR_PHYS_ADDR((CONFIG_SYS_NAND_BASE_PHYS + 0x40000)) \ + (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \ | (2<