From d37012289df80f3907a54bb01ffc38a394fa0766 Mon Sep 17 00:00:00 2001 From: chenhui zhao Date: Tue, 6 Sep 2011 16:41:18 +0000 Subject: powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui --- include/configs/MPC8548CDS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a99f8d5..1a6ba69 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -464,6 +464,8 @@ extern unsigned long get_clock_freq(void); #define CONFIG_TSEC4_NAME "eTSEC3" #undef CONFIG_MPC85XX_FEC +#define CONFIG_PHY_MARVELL + #define TSEC1_PHY_ADDR 0 #define TSEC2_PHY_ADDR 1 #define TSEC3_PHY_ADDR 2 -- cgit v1.1 From 8d22ddca3db2577b7f2bf1040972231279288847 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 9 Nov 2011 09:10:49 -0600 Subject: powerpc/85xx: Fix NAND SPL support We cause CCSRBAR to be relocated in the SPL phase of NAND boot which isn't expected and breaks things. Fixing the board config.h to NOT relocate CCSR during the CONFIG_NAND_SPL phase. Signed-off-by: Kumar Gala --- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8569MDS.h | 2 +- include/configs/MPC8572DS.h | 2 +- include/configs/P1_P2_RDB.h | 2 +- include/configs/p1_p2_rdb_pc.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index d4e3ef5..16db98f 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -131,7 +131,7 @@ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 19d3271..ab27b98 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -108,7 +108,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index ffee8fc..d7910e1 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -115,7 +115,7 @@ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 883d44e..00fa74d 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -151,7 +151,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR -#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index bcfb034..5a69902 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -221,7 +221,7 @@ /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k SPL code*/ -#if defined(CONFIG_NAND_U_BOOT) && defined(CONFIG_NAND_SPL) +#if defined(CONFIG_NAND_SPL) #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -- cgit v1.1 From 07b5edc20633b803ac047bddff569432dab7a917 Mon Sep 17 00:00:00 2001 From: Jerry Huang Date: Wed, 2 Nov 2011 09:16:44 +0800 Subject: powerpc/85xx: Set max alloc length to 10MB on P1022DS In order to support 1920x01080 resolution, we must increase the alloc length. Signed-off-by: Jerry Huang CC: Anatolij Gustschin Acked-by: Timur Tabi Signed-off-by: Kumar Gala --- include/configs/P1022DS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 0077060..1158fec 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -173,7 +173,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) /* * Serial Port -- cgit v1.1 From c27ff9b623067549e937bd419adb98f2db2b15c7 Mon Sep 17 00:00:00 2001 From: Xie Xiaobo Date: Fri, 11 Nov 2011 17:19:41 +0800 Subject: phylib: Enable AR8021 phy support Enable AR8021 as it used on Freescale boards: P1020RDB-PC, P1021RDB-PC, P2020RDB-PC, P1020UTM-PC, and P1020MSBG-PC. Signed-off-by: Xie Xiaobo Signed-off-by: Kumar Gala --- include/config_phylib_all_drivers.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/config_phylib_all_drivers.h b/include/config_phylib_all_drivers.h index 903c7a7..1db7cec 100644 --- a/include/config_phylib_all_drivers.h +++ b/include/config_phylib_all_drivers.h @@ -22,6 +22,7 @@ #define CONFIG_PHY_REALTEK #define CONFIG_PHY_NATSEMI #define CONFIG_PHY_LXT +#define CONFIG_PHY_ATHEROS #ifdef CONFIG_PHYLIB_10G #define CONFIG_PHY_TERANETICS -- cgit v1.1