From 98d92d8c9f4021629a45261ad5ec3f3595f3a27a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 28 Oct 2009 22:07:56 +0100 Subject: sbc8349: fix incorrect comment The comment for the BR0_PRELIM port size initialization incorrectly stated 32 bit, while it's actually 16 bit. The code is correct. Reported-by: Guenter Koellner Signed-off-by: Wolfgang Denk --- include/configs/sbc8349.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4dea27d..7bef119 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -158,7 +158,7 @@ /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | /* flash Base address */ \ - (2 << BR_PS_SHIFT) | /* 32 bit port size */ \ + (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ BR_V) /* valid */ #define CONFIG_SYS_OR0_PRELIM 0xFF806FF7 /* 8 MB flash size */ -- cgit v1.1 From 01471d538fb163f472a769f21267d7676c91267c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 4 Nov 2009 01:29:04 -0600 Subject: Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support" This reverts commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc. There isn't any need to modify the API for fsl_pci_init_port to pass the status of host/agent(end-point) status. We can determine that internally to fsl_pci_init_port. Revert the patch that makes the API change. Signed-off-by: Kumar Gala --- include/asm-ppc/fsl_pci.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 6b0c89b..2790da7 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -62,7 +62,6 @@ typedef struct pci_inbound_window { #define PIWAR_LOCAL 0x00f00000 #define PIWAR_READ_SNOOP 0x00050000 #define PIWAR_WRITE_SNOOP 0x00005000 -#define PIWAR_IWS_4K 0x0000000b u32 res2[3]; } pit_t; @@ -172,7 +171,7 @@ struct fsl_pci_info { }; int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno, int pcie_ep); + struct pci_controller *hose, int busno); #define SET_STD_PCI_INFO(x, num) \ { \ -- cgit v1.1 From 715d8f7608f77c93f1807a032644893fd5b6d08b Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Mon, 2 Nov 2009 09:05:49 -0600 Subject: fsl_pci_init_port end-point initialization is broken commit 70ed869e broke fsl pcie end-point initialization. Returning 0 is not correct. The function must return the first free bus number for the next controller. fsl_pci_init() must still be called and a bus allocated even if the controller is an end-point. Signed-off-by: Ed Swarthout Acked-by: Vivek Mahajan Signed-off-by: Kumar Gala --- include/asm-ppc/fsl_pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 2790da7..a5f72f5 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -25,6 +25,7 @@ int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent); int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel); +int fsl_is_pci_agent(struct pci_controller *hose); void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data); void fsl_pci_config_unlock(struct pci_controller *hose); void ft_fsl_pci_setup(void *blob, const char *pci_alias, -- cgit v1.1 From 25793f76bf9a7be59c9415ef0f78d034e8d53dae Mon Sep 17 00:00:00 2001 From: Remy Bohmer Date: Thu, 29 Oct 2009 12:29:37 +0100 Subject: ARM: Use Linux version for unaligned access code The asm-arm/unaligned.h includes linux/unaligned/access_ok.h This file is unsafe to be used on ARM, since it does an unaligned memory accesses which fails on ARM. Lookin at Linux the basic difference seems to be the header "include/asm-arm/unaligned.h". The Linux version of "unaligned.h" does *not* include "access_ok.h" at all. It includes "le_byteshift.h" and "be_byteshift.h" instead. Signed-off-by: Remy Bohmer Signed-off-by: Stefan Roese -- include/asm-arm/unaligned.h | 3 - include/linux/unaligned/be_byteshift.h | 70 +++++++++++++++++++++++++++++++++ include/linux/unaligned/le_byteshift.h | 70 +++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 include/linux/unaligned/be_byteshift.h create mode 100644 include/linux/unaligned/le_byteshift.h --- include/asm-arm/unaligned.h | 3 +- include/linux/unaligned/be_byteshift.h | 70 ++++++++++++++++++++++++++++++++++ include/linux/unaligned/le_byteshift.h | 70 ++++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+), 1 deletion(-) create mode 100644 include/linux/unaligned/be_byteshift.h create mode 100644 include/linux/unaligned/le_byteshift.h (limited to 'include') diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h index d644df7..44593a8 100644 --- a/include/asm-arm/unaligned.h +++ b/include/asm-arm/unaligned.h @@ -1,7 +1,8 @@ #ifndef _ASM_ARM_UNALIGNED_H #define _ASM_ARM_UNALIGNED_H -#include +#include +#include #include /* diff --git a/include/linux/unaligned/be_byteshift.h b/include/linux/unaligned/be_byteshift.h new file mode 100644 index 0000000..9356b24 --- /dev/null +++ b/include/linux/unaligned/be_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H +#define _LINUX_UNALIGNED_BE_BYTESHIFT_H + +#include + +static inline u16 __get_unaligned_be16(const u8 *p) +{ + return p[0] << 8 | p[1]; +} + +static inline u32 __get_unaligned_be32(const u8 *p) +{ + return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]; +} + +static inline u64 __get_unaligned_be64(const u8 *p) +{ + return (u64)__get_unaligned_be32(p) << 32 | + __get_unaligned_be32(p + 4); +} + +static inline void __put_unaligned_be16(u16 val, u8 *p) +{ + *p++ = val >> 8; + *p++ = val; +} + +static inline void __put_unaligned_be32(u32 val, u8 *p) +{ + __put_unaligned_be16(val >> 16, p); + __put_unaligned_be16(val, p + 2); +} + +static inline void __put_unaligned_be64(u64 val, u8 *p) +{ + __put_unaligned_be32(val >> 32, p); + __put_unaligned_be32(val, p + 4); +} + +static inline u16 get_unaligned_be16(const void *p) +{ + return __get_unaligned_be16((const u8 *)p); +} + +static inline u32 get_unaligned_be32(const void *p) +{ + return __get_unaligned_be32((const u8 *)p); +} + +static inline u64 get_unaligned_be64(const void *p) +{ + return __get_unaligned_be64((const u8 *)p); +} + +static inline void put_unaligned_be16(u16 val, void *p) +{ + __put_unaligned_be16(val, p); +} + +static inline void put_unaligned_be32(u32 val, void *p) +{ + __put_unaligned_be32(val, p); +} + +static inline void put_unaligned_be64(u64 val, void *p) +{ + __put_unaligned_be64(val, p); +} + +#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */ diff --git a/include/linux/unaligned/le_byteshift.h b/include/linux/unaligned/le_byteshift.h new file mode 100644 index 0000000..be376fb --- /dev/null +++ b/include/linux/unaligned/le_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H +#define _LINUX_UNALIGNED_LE_BYTESHIFT_H + +#include + +static inline u16 __get_unaligned_le16(const u8 *p) +{ + return p[0] | p[1] << 8; +} + +static inline u32 __get_unaligned_le32(const u8 *p) +{ + return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24; +} + +static inline u64 __get_unaligned_le64(const u8 *p) +{ + return (u64)__get_unaligned_le32(p + 4) << 32 | + __get_unaligned_le32(p); +} + +static inline void __put_unaligned_le16(u16 val, u8 *p) +{ + *p++ = val; + *p++ = val >> 8; +} + +static inline void __put_unaligned_le32(u32 val, u8 *p) +{ + __put_unaligned_le16(val >> 16, p + 2); + __put_unaligned_le16(val, p); +} + +static inline void __put_unaligned_le64(u64 val, u8 *p) +{ + __put_unaligned_le32(val >> 32, p + 4); + __put_unaligned_le32(val, p); +} + +static inline u16 get_unaligned_le16(const void *p) +{ + return __get_unaligned_le16((const u8 *)p); +} + +static inline u32 get_unaligned_le32(const void *p) +{ + return __get_unaligned_le32((const u8 *)p); +} + +static inline u64 get_unaligned_le64(const void *p) +{ + return __get_unaligned_le64((const u8 *)p); +} + +static inline void put_unaligned_le16(u16 val, void *p) +{ + __put_unaligned_le16(val, p); +} + +static inline void put_unaligned_le32(u32 val, void *p) +{ + __put_unaligned_le32(val, p); +} + +static inline void put_unaligned_le64(u64 val, void *p) +{ + __put_unaligned_le64(val, p); +} + +#endif /* _LINUX_UNALIGNED_LE_BYTESHIFT_H */ -- cgit v1.1 From 916ed9444d3ab7b5cd6312557005f2a764a8baf7 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 29 Oct 2009 18:37:45 +0100 Subject: ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z) This patch fixes a problem only seen very occasionally on Canyonlands. The NOR flash interface (CFI driver) doesn't work reliably in all cases. Erasing and/or programming sometimes doesn't work. Sometimes with an error message, like "flash not erased" when trying to program an area that should have just been erased. And sometimes without any error messages. As mentioned above, this problem was only seen rarely and with some PLL configuration (CPU speed, EBC speed). Now I spotted this problem a few times, when running my Canyonlands with the following setup (chip_config): 1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100 Changing the EBC configuration to not release the bus into high impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1 in EBC0_CFG) seems to fix this problem. I haven't seen any failure anymore with this patch applied. Signed-off-by: Stefan Roese Cc: David Mitchell Cc: Jeff Mann --- include/configs/canyonlands.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 3dddccf..ac9b3c5 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -593,7 +593,7 @@ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_FPGA_BASE | 0x3a000) /* BAS=FPGA,BS=2MB,BU=R/W,BW=16bit*/ #endif /* !defined(CONFIG_ARCHES) */ -#define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */ +#define CONFIG_SYS_EBC_CFG 0xbfc00000 /* * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO -- cgit v1.1 From d14c7ec2b51fb92c4a5218b299b772c3d186510d Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Mon, 9 Nov 2009 13:09:57 -0800 Subject: Fix SMC91111 regression: lpd7a40x build failures Both lpd7a400 and lpd7a404 failed to compile because they had CONFIG_SMC_USE_IOFUNCS defined: examples/standalone/smc91111_eeprom.c:388: undefined reference to `SMC_outw' Also removed an orphaned paren in lpd7a404.h Signed-off-by: Ben Warren --- include/configs/lpd7a400-10.h | 1 - include/configs/lpd7a404-10.h | 1 - include/configs/lpd7a404.h | 2 +- 3 files changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h index 5f57c3a..91bf1fa 100644 --- a/include/configs/lpd7a400-10.h +++ b/include/configs/lpd7a400-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A400_10_H */ diff --git a/include/configs/lpd7a404-10.h b/include/configs/lpd7a404-10.h index 9074e28..b10e69d 100644 --- a/include/configs/lpd7a404-10.h +++ b/include/configs/lpd7a404-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A404_10_H */ diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h index 102c0af..557f389 100644 --- a/include/configs/lpd7a404.h +++ b/include/configs/lpd7a404.h @@ -72,7 +72,7 @@ #include #ifndef USE_920T_MMU - #define CONFIG_CMD_PING) + #define CONFIG_CMD_PING #undef CONFIG_CMD_CACHE #else #define CONFIG_CMD_DATE -- cgit v1.1