From 61bd2f75f5eaf645e2c90fe2294cba37f7d8627f Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 4 Nov 2015 09:53:10 -0800 Subject: drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 Freescale LSCH3 platforms use two DDR controlers interleaving mode out of reset. It can be configured to disable one controller. To support this operation, the driver needs to detect and skip the disabled controller. Signed-off-by: York Sun --- include/fsl_ddr.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/fsl_ddr.h') diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 1ac092b..9aaf6b3 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -131,6 +131,7 @@ void board_add_ram_info(int use_default); /* processor specific function */ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, unsigned int ctrl_num, int step); +void remove_unused_controllers(fsl_ddr_info_t *info); /* board specific function */ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, -- cgit v1.1