From 56848428a88f89420ae7acc04bb5805e70c430a3 Mon Sep 17 00:00:00 2001 From: York Sun Date: Thu, 23 Jul 2015 14:04:48 -0700 Subject: drivers/ddr/fsl: Adjust bstopre value By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge. Signed-off-by: York Sun --- include/fsl_ddr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/fsl_ddr.h') diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 728503b..1ac092b 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -103,7 +103,7 @@ unsigned int compute_lowest_common_dimm_parameters( const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms); -unsigned int populate_memctl_options(int all_dimms_registered, +unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num); -- cgit v1.1