From 1c69a51cc35b6ade8df7c0309f2a2f2f5d493e9d Mon Sep 17 00:00:00 2001 From: Alison Wang Date: Tue, 21 Apr 2015 16:04:38 +0800 Subject: arm: ls102xa: Adjust the load address of U-Boot for NOR boot The original load address of U-Boot is 0x67f80000. The address space of NOR flash is 0x60000000 to 0x67ffffff. It will cause the size of u-boot couldn't be larger than 512K. As more features are supported in u-boot, the size of u-boot is larger than 512K. To fix this issue, the load address of U-Boot for NOR boot is adjusted to 0x60100000. In RCW, the PBI command needs to change as follows: .pbi -write 0xee0200, 0x67f80000 +write 0xee0200, 0x60100000 .end Signed-off-by: Alison Wang Reviewed-by: York Sun --- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 9a8fd50..1a41a2f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -124,7 +124,7 @@ unsigned long get_board_ddr_clk(void); #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x67f80000 +#define CONFIG_SYS_TEXT_BASE 0x60100000 #endif #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 729205f..9cad60c 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -73,7 +73,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x67f80000 +#define CONFIG_SYS_TEXT_BASE 0x60100000 #endif #define CONFIG_NR_DRAM_BANKS 1 -- cgit v1.1 From a88cc3bd90b05420a84ee360efa1133652dcac5c Mon Sep 17 00:00:00 2001 From: York Sun Date: Wed, 29 Apr 2015 10:35:35 -0700 Subject: arm/ls1021a: Remove ccsr_ddr from immap_ls102xa.h ccsr_ddr structure is already defined in fsl_immap.h. Remove this duplicated define. Move fixed timing into ls1021atwr.h. Signed-off-by: York Sun CC: Alison Wang Acked-by: Alison Wang --- include/configs/ls1021atwr.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include/configs') diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 9cad60c..8ea428e 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -35,6 +35,29 @@ #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 +#define DDR_SDRAM_CFG 0x470c0008 +#define DDR_CS0_BNDS 0x008000bf +#define DDR_CS0_CONFIG 0x80014302 +#define DDR_TIMING_CFG_0 0x50550004 +#define DDR_TIMING_CFG_1 0xbcb38c56 +#define DDR_TIMING_CFG_2 0x0040d120 +#define DDR_TIMING_CFG_3 0x010e1000 +#define DDR_TIMING_CFG_4 0x00000001 +#define DDR_TIMING_CFG_5 0x03401400 +#define DDR_SDRAM_CFG_2 0x00401010 +#define DDR_SDRAM_MODE 0x00061c60 +#define DDR_SDRAM_MODE_2 0x00180000 +#define DDR_SDRAM_INTERVAL 0x18600618 +#define DDR_DDR_WRLVL_CNTL 0x8655f605 +#define DDR_DDR_WRLVL_CNTL_2 0x05060607 +#define DDR_DDR_WRLVL_CNTL_3 0x05050505 +#define DDR_DDR_CDR1 0x80040000 +#define DDR_DDR_CDR2 0x00000001 +#define DDR_SDRAM_CLK_CNTL 0x02000000 +#define DDR_DDR_ZQ_CNTL 0x89080600 +#define DDR_CS0_CONFIG_2 0 +#define DDR_SDRAM_CFG_MEM_EN 0x80000000 + #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg #endif -- cgit v1.1