From 4f92ed5fc083631ac7aef6c027cdf1177befd204 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 7 Aug 2006 14:33:32 +0200 Subject: Add commandline history support to all AMCC eval boards Patch by Stefan Roese, 07 Aug 2006 --- include/configs/yosemite.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/configs/yosemite.h') diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index a81cf34..86a85b8 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -231,6 +231,7 @@ CFG_CMD_DHCP | \ CFG_CMD_DIAG | \ CFG_CMD_ELF | \ + CFG_CMD_EEPROM | \ CFG_CMD_I2C | \ CFG_CMD_IRQ | \ CFG_CMD_MII | \ @@ -272,6 +273,12 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOOPW 1 /* enable loopw command */ +#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- -- cgit v1.1 From 887e2ec9ecf49366a60a49b32b73825804909865 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 7 Sep 2006 11:51:23 +0200 Subject: Add support for AMCC Sequoia PPC440EPx eval board - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006 --- include/configs/yosemite.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs/yosemite.h') diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 86a85b8..3d7b4a2 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -65,6 +65,7 @@ /*----------------------------------------------------------------------- * Initial RAM & stack pointer (placed in SDRAM) *----------------------------------------------------------------------*/ +#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */ #define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */ #define CFG_INIT_RAM_END (8 << 10) #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data*/ -- cgit v1.1