From 3365b4eb5543ae26579321da34cca42e38ac130f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 21 Jul 2015 14:04:22 +0900 Subject: ARM: UniPhier: add PH1-sLD3 SoC support The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada --- include/configs/uniphier.h | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'include/configs/uniphier.h') diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5ec60d6..908be26 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,15 +9,18 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#if defined(CONFIG_MACH_PH1_PRO4) +#if defined(CONFIG_MACH_PH1_SLD3) #define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 2 +#define CONFIG_DDR_NUM_CH1 1 +#define CONFIG_DDR_NUM_CH2 1 /* Physical start address of SDRAM */ #define CONFIG_SDRAM0_BASE 0x80000000 #define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_BASE 0xc0000000 #define CONFIG_SDRAM1_SIZE 0x20000000 +#define CONFIG_SDRAM2_BASE 0xc0000000 +#define CONFIG_SDRAM2_SIZE 0x10000000 #endif #if defined(CONFIG_MACH_PH1_LD4) @@ -31,6 +34,17 @@ #define CONFIG_SDRAM1_SIZE 0x10000000 #endif +#if defined(CONFIG_MACH_PH1_PRO4) +#define CONFIG_DDR_NUM_CH0 2 +#define CONFIG_DDR_NUM_CH1 2 + +/* Physical start address of SDRAM */ +#define CONFIG_SDRAM0_BASE 0x80000000 +#define CONFIG_SDRAM0_SIZE 0x20000000 +#define CONFIG_SDRAM1_BASE 0xa0000000 +#define CONFIG_SDRAM1_SIZE 0x20000000 +#endif + #if defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_DDR_NUM_CH0 1 #define CONFIG_DDR_NUM_CH1 1 @@ -177,8 +191,13 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 +#ifdef CONFIG_MACH_PH1_SLD3 +#define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 +#define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 +#else #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 +#endif #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) @@ -294,7 +313,8 @@ #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE) #endif -#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ + defined(CONFIG_MACH_PH1_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #endif #if defined(CONFIG_MACH_PH1_PRO4) -- cgit v1.1