From 5e46f83cc3569b95cef68dfd0722663260af91d0 Mon Sep 17 00:00:00 2001 From: Chander Kashyap Date: Sun, 5 Feb 2012 23:01:45 +0000 Subject: Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture. Signed-off-by: Chander Kashyap Signed-off-by: Minkyu Kang --- include/configs/trats.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs/trats.h') diff --git a/include/configs/trats.h b/include/configs/trats.h index acb3241..10f11d9 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -49,6 +49,7 @@ /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */ #define CONFIG_SYS_CLK_FREQ_C210 24000000 +#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG -- cgit v1.1