From 96d21237ec2b799f60a827ea680594b7ebfdac7f Mon Sep 17 00:00:00 2001
From: Anton staaf <robotboy@chromium.org>
Date: Mon, 3 Oct 2011 13:54:58 +0000
Subject: tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Tom Warren <twarren.nvidia@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: Mike Frysinger <vapier@gentoo.org>
---
 include/configs/tegra2-common.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'include/configs/tegra2-common.h')

diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index 73e0f05..a9c665c 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -33,6 +33,8 @@
 #define CONFIG_MACH_TEGRA_GENERIC	/* which is a Tegra generic machine */
 #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #define CONFIG_ENABLE_CORTEXA9		/* enable CPU (A9 complex) */
 
 #include <asm/arch/tegra2.h>		/* get chip and board defs */
-- 
cgit v1.1