From 3709844f2366cd75eacee1deeedadaa507ddc9a1 Mon Sep 17 00:00:00 2001
From: Albert ARIBAUD <albert.u.boot@aribaud.net>
Date: Wed, 27 Jan 2016 08:46:11 +0100
Subject: armv7: add cacheline sizes where missing

Some armv7 targets are missing a cache line size declaration.
In preparation for "arm: cache: Implement cache range check for v7"
patch, add these declarations with the appropriate value for
the target's SoC or CPU.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
 include/configs/s5p_goni.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'include/configs/s5p_goni.h')

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8f65d7e..f92c23d 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -17,6 +17,8 @@
 #define CONFIG_S5PC110		1	/* which is in a S5PC110 */
 #define CONFIG_MACH_GONI	1	/* working with Goni */
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #include <linux/sizes.h>
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 
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