From 166ef1e90ce404a6470a1c4910a1e84404379b86 Mon Sep 17 00:00:00 2001 From: Gong Qianyu Date: Mon, 25 Jan 2016 15:16:06 +0800 Subject: armv8/ls1043aqds: add QSPI support in SD boot QSPI and IFC are pin-multiplexed on LS1043A. So we use ls1043aqds_sdcard_ifc_defconfig to support IFC in SD boot and ls1043aqds_sdcard_qspi_defconfig to support QSPI in SD boot. Signed-off-by: Gong Qianyu Reviewed-by: York Sun --- include/configs/ls1043aqds.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'include/configs/ls1043aqds.h') diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index e6725e3..60d189b 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -85,8 +85,13 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_SD_BOOT +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg +#else #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif +#endif /* LPUART */ #ifdef CONFIG_LPUART @@ -113,6 +118,7 @@ unsigned long get_board_ddr_clk(void); /* * IFC Definitions */ +#ifndef CONFIG_SD_BOOT_QSPI #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ @@ -196,6 +202,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#endif #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ @@ -203,6 +210,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_NO_FLASH +#undef CONFIG_CMD_IMLS +#endif + /* * QIXIS Definitions */ @@ -219,6 +232,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_ALTBANK 0x04 #define QIXIS_LBMAP_NAND 0x09 #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_SD_QSPI 0xff #define QIXIS_RCW_SRC_NAND 0x106 #define QIXIS_RCW_SRC_SD 0x040 #define QIXIS_RST_CTL_RESET 0x41 @@ -347,6 +361,16 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 +/* QSPI device */ +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_FSL_QSPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_NUM 2 +#endif +#endif + /* * Miscellaneous configurable options */ -- cgit v1.1