From 2da0fc0d0fcdd991220cc120e5bc6d44991a5987 Mon Sep 17 00:00:00 2001 From: Dirk Eibach Date: Fri, 21 Jan 2011 09:31:21 +0100 Subject: ppc4xx: Add DLVision-10G board support Board support for the Guntermann & Drunck DLVision-10G. Adds support for multiple FPGAs per board for gdsys 405ep architecture. Adds support for dual link osd hardware for gdsys 405ep. Signed-off-by: Dirk Eibach Signed-off-by: Stefan Roese --- include/configs/io.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'include/configs/io.h') diff --git a/include/configs/io.h b/include/configs/io.h index a66c704..9d2a87d 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -229,13 +229,15 @@ #define CONFIG_SYS_EBC_PB1CR 0x7f318000 /* Memory Bank 2 (FPGA) initialization */ -#define CONFIG_SYS_FPGA_BASE 0x7f100000 +#define CONFIG_SYS_FPGA0_BASE 0x7f100000 #define CONFIG_SYS_EBC_PB2AP 0x02025080 /* BAS=0x7f1,BS=1MB,BU=R/W,BW=16bit */ #define CONFIG_SYS_EBC_PB2CR 0x7f11a000 -#define CONFIG_SYS_FPGA_RFL_LOW 0x0000 -#define CONFIG_SYS_FPGA_RFL_HIGH 0x3ffe +#define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE +#define CONFIG_SYS_FPGA_DONE(k) 0x0010 + +#define CONFIG_SYS_FPGA_COUNT 1 /* Memory Bank 3 (Latches) initialization */ #define CONFIG_SYS_LATCH_BASE 0x7f200000 -- cgit v1.1