From 643be9c07e1c2abcc45d0efd4bbe562c4cb8dcaa Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Thu, 4 Jul 2013 12:29:17 +0530 Subject: EXYNOS: Move files from board/samsung to arch/arm This patch performs the following: 1) Convert the assembly code for memory and clock initialization to C code. 2) Move the memory and clock init codes from board/samsung to arch/arm 3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted the common lowlevel_init from assembly to C-code 4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5. 5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already done in _main. 6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250. TEST: Tested SD-MMC boot on SMDK5250 and Origen. Tested USB and SPI boot on SMDK5250 Compile tested for SMDKV310. Signed-off-by: Rajeshwari Shinde Signed-off-by: Minkyu Kang --- include/configs/exynos5250-dt.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/configs/exynos5250-dt.h') diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 6c7a052..b32d1bd 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -104,6 +104,7 @@ #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_SKIP_LOWLEVEL_INIT /* PWM */ #define CONFIG_PWM @@ -137,6 +138,7 @@ #define CONFIG_USB_STORAGE /* USB boot mode */ +#define CONFIG_USB_BOOTING #define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070 #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 @@ -152,6 +154,8 @@ #define CONFIG_SPL #define COPY_BL2_FNPTR_ADDR 0x02020030 +#define CONFIG_SPL_LIBCOMMON_SUPPORT + /* specific .lds file */ #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x02023400 @@ -229,7 +233,7 @@ #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) -#define OM_STAT (0x1f << 1) +#define CONFIG_SPI_BOOTING #define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 #define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) @@ -241,7 +245,7 @@ #define CONFIG_IRAM_STACK 0x02050000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK /* I2C */ #define CONFIG_SYS_I2C_INIT_BOARD -- cgit v1.1