From b67d8816fd62f0a379caa16846381b5a4e4de398 Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Thu, 2 Feb 2012 00:44:39 +0000 Subject: arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGH The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit. Signed-off-by: Christian Riesch Reported-by: Sughosh Ganu Cc: Albert Aribaud Cc: Tom Rini Cc: Sughosh Ganu Cc: Heiko Schocher --- include/configs/da850evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs/da850evm.h') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 51a5a09..8e0293d 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -37,6 +37,7 @@ #define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ #define CONFIG_SOC_DA850 /* TI DA850 SoC */ +#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) #define CONFIG_SYS_OSCIN_FREQ 24000000 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -- cgit v1.1