From 8aa1a2d115420b1eb126f69f3547b54d275c3228 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Mon, 4 Apr 2005 12:44:11 +0000
Subject: Patch by Steven Scholz, 4 Apr 2005: - remove all references to
 CONFIG_INIT_CRITICAL for ARM based boards - introduce two new configuration
 options instead:   CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT

---
 include/configs/cmc_pu2.h | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

(limited to 'include/configs/cmc_pu2.h')

diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 96b7148..5e96e09 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -25,12 +25,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/*
- * If we are developing, we might want to start armboot from ram
- * so we MUST NOT initialize critical regs like mem-timing ...
- */
-#define CONFIG_INIT_CRITICAL
-
 /* ARM asynchronous clock */
 #define AT91C_MAIN_CLOCK	207360000	/* from 18.432 MHz crystal (18432000 / 4 * 45) */
 #define AT91C_MASTER_CLOCK	(AT91C_MAIN_CLOCK/3)	/* peripheral clock */
@@ -44,7 +38,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS 1
 #define CONFIG_INITRD_TAG	1
 
-#ifdef CONFIG_INIT_CRITICAL
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 #define CFG_USE_MAIN_OSCILLATOR		1
 /* flash */
 #define MC_PUIA_VAL	0x00000000
@@ -74,7 +68,7 @@
 #define SDRC_MR_VAL2	0x00000003 /* Load Mode Register */
 #define SDRC_MR_VAL3	0x00000000 /* Normal Mode */
 #define SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
-#endif	/* CONFIG_INIT_CRITICAL */
+#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */
 
 /*
  * Size of malloc() pool
-- 
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