From 5066e62847bddf6030262ade2aa3e7bcdc930037 Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Thu, 26 Mar 2015 16:13:09 +0800 Subject: T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue T2080QDS PEX1/Slot#1 will down-train from x4 to x2, with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15. Soft reset PCIe can fix this issue. Signed-off-by: Zhao Qiang Reviewed-by: York Sun --- include/configs/T208xQDS.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/configs/T208xQDS.h') diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 046aa48..6adcb22 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -575,6 +575,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE2 /* PCIE controler 2 */ #define CONFIG_PCIE3 /* PCIE controler 3 */ #define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_FSL_PCIE_RESET #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ -- cgit v1.1