From 0e16387db1d4aacd5bf35cb6d7c1942765c0347b Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Wed, 28 Jun 2006 10:43:36 -0500 Subject: * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger --- include/configs/MPC8548CDS.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/configs/MPC8548CDS.h') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 4ca8bc3..b1f8a19 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -314,6 +314,18 @@ extern unsigned long get_clock_freq(void); #define CFG_PROMPT_HUSH_PS2 "> " #endif +/* pass open firmware flat tree */ +#define CONFIG_OF_FLAT_TREE 1 +#define CONFIG_OF_BOARD_SETUP 1 + +/* maximum size of the flat tree (8K) */ +#define OF_FLAT_TREE_MAX_SIZE 8192 + +#define OF_CPU "PowerPC,8548@0" +#define OF_SOC "soc8548@e0000000" +#define OF_TBCLK (bd->bi_busfreq / 8) +#define OF_STDOUT_PATH "/soc8548@e0000000/serial@4500" + /* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ -- cgit v1.1 From bf1dfffd8c26f8ecdd630a0ae4c834e751e4e452 Mon Sep 17 00:00:00 2001 From: Matthew McClintock Date: Wed, 28 Jun 2006 10:46:13 -0500 Subject: * Added VIA configuration table * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming --- include/configs/MPC8548CDS.h | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) (limited to 'include/configs/MPC8548CDS.h') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b1f8a19..37b518c 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -324,7 +324,7 @@ extern unsigned long get_clock_freq(void); #define OF_CPU "PowerPC,8548@0" #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8548@e0000000/serial@4500" +#define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" /* I2C */ #define CONFIG_HARD_I2C /* I2C with hardware support */ @@ -341,32 +341,27 @@ extern unsigned long get_clock_freq(void); #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CFG_PCI1_IO_BASE 0xe2000000 -#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE -#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */ +#define CFG_PCI1_IO_BASE 0x00000000 +#define CFG_PCI1_IO_PHYS 0xe2000000 +#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */ #define CFG_PCI2_MEM_BASE 0xa0000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE #define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */ -#define CFG_PCI2_IO_BASE 0xe3000000 -#define CFG_PCI2_IO_PHYS CFG_PCI2_IO_BASE -#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */ +#define CFG_PCI2_IO_BASE 0x00000000 +#define CFG_PCI2_IO_PHYS 0xe2100000 +#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */ #if defined(CONFIG_PCI) #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_85XX_PCI2 #undef CONFIG_EEPRO100 #undef CONFIG_TULIP -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /*slot0->3(IDSEL)=12->15*/ -#endif - #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ @@ -386,7 +381,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1" #define CONFIG_MPC85XX_TSEC3 1 #define CONFIG_MPC85XX_TSEC3_NAME "eTSEC2" -#define CONFIG_MPC85XX_TSEC4 1 +#undef CONFIG_MPC85XX_TSEC4 #define CONFIG_MPC85XX_TSEC4_NAME "eTSEC3" #undef CONFIG_MPC85XX_FEC -- cgit v1.1 From 09f3e09e9ebcfa7919ca8931a4b5504fadd1f1d3 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Wed, 13 Sep 2006 10:34:18 -0500 Subject: Add support for eTSEC 3 & 4 on 8548 CDS * Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS. This will only work on rev 1.3 boards (but doesn't break older boards) * Cleaned up some comments to reflect the expanded role of tsec in other systems --- include/configs/MPC8548CDS.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/configs/MPC8548CDS.h') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 37b518c..767ab33 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -381,7 +381,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1" #define CONFIG_MPC85XX_TSEC3 1 #define CONFIG_MPC85XX_TSEC3_NAME "eTSEC2" -#undef CONFIG_MPC85XX_TSEC4 +#define CONFIG_MPC85XX_TSEC4 1 #define CONFIG_MPC85XX_TSEC4_NAME "eTSEC3" #undef CONFIG_MPC85XX_FEC @@ -483,6 +483,8 @@ extern unsigned long get_clock_freq(void); #define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD #define CONFIG_HAS_ETH2 #define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD +#define CONFIG_HAS_ETH3 +#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD #endif #define CONFIG_IPADDR 192.168.1.253 -- cgit v1.1 From 8272dc2f58f2473d8995fcc9b916440cfba080f0 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Wed, 13 Sep 2006 10:33:35 -0500 Subject: Updated config headers to add default FDT-based booting --- include/configs/MPC8548CDS.h | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'include/configs/MPC8548CDS.h') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 767ab33..03ab976 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -389,13 +389,11 @@ extern unsigned long get_clock_freq(void); #define TSEC2_PHY_ADDR 1 #define TSEC3_PHY_ADDR 2 #define TSEC4_PHY_ADDR 3 -#define FEC_PHY_ADDR 3 #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 #define TSEC4_PHYIDX 0 -#define FEC_PHYIDX 0 /* Options are: eTSEC[0-3] */ #define CONFIG_ETHPRIME "eTSEC0" @@ -507,8 +505,11 @@ extern unsigned long get_clock_freq(void); #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS1\0" \ - "ramdiskaddr=400000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" + "ramdiskaddr=600000\0" \ + "ramdiskfile=your.ramdisk.u-boot\0" \ + "fdtaddr=400000\0" \ + "fdtfile=your.fdt.dtb\0" + #define CONFIG_NFSBOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw " \ @@ -516,7 +517,9 @@ extern unsigned long get_clock_freq(void); "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr" + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ -- cgit v1.1 From 2047672684cf85cb6f96a1fbc993180aaaf19a99 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Fri, 20 Oct 2006 15:50:15 -0500 Subject: Converted all 85xx boards to use a common FSL I2C driver. Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: Jon Loeliger --- include/configs/MPC8548CDS.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/configs/MPC8548CDS.h') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 03ab976..be8f93f 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -326,13 +326,17 @@ extern unsigned long get_clock_freq(void); #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" -/* I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_EEPROM_ADDR 0x57 #define CFG_I2C_SLAVE 0x7F #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */ +#define CFG_I2C_OFFSET 0x3000 /* * General PCI -- cgit v1.1