From 7211fbfa18f3061858696150ee6e9e093d9eceae Mon Sep 17 00:00:00 2001
From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Thu, 21 May 2009 15:34:14 -0400
Subject: drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs

Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 include/asm-ppc/immap_qe.h | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'include/asm-ppc/immap_qe.h')

diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index 44c0c0a..41e4583 100644
--- a/include/asm-ppc/immap_qe.h
+++ b/include/asm-ppc/immap_qe.h
@@ -607,4 +607,12 @@ extern qe_map_t *qe_immr;
 #define QE_MURAM_SIZE		0x4000UL
 #endif
 
+#if defined(CONFIG_MPC8323)
+#define MAX_QE_RISC     1
+#elif defined(CONFIG_MPC8569)
+#define MAX_QE_RISC     4
+#else
+#define MAX_QE_RISC	2
+#endif
+
 #endif				/* __IMMAP_QE_H__ */
-- 
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