From 6069ff265362ef6239749b5f598b137f407b821e Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Fri, 28 Feb 2003 00:49:47 +0000
Subject: * Add support for 16 MB flash configuration of TRAB board

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS

* Add image information to README

* Fix dual PCMCIA slot support (when running with just one
  slot populated)

* Add VFD type detection to trab board

* extend drivers/cs8900.c driver to synchronize  ethaddr  environment
  variable with value in the EEPROM

* Start adding MIPS support files
---
 include/asm-mips/ptrace.h | 86 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 86 insertions(+)
 create mode 100644 include/asm-mips/ptrace.h

(limited to 'include/asm-mips/ptrace.h')

diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
new file mode 100644
index 0000000..2517adb
--- /dev/null
+++ b/include/asm-mips/ptrace.h
@@ -0,0 +1,86 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000 by Ralf Baechle
+ *
+ * Machine dependent structs and defines to help the user use
+ * the ptrace system call.
+ */
+#ifndef _ASM_PTRACE_H
+#define _ASM_PTRACE_H
+
+#include <asm/isadep.h>
+#include <linux/types.h>
+
+/* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
+#define FPR_BASE	32
+#define PC		64
+#define CAUSE		65
+#define BADVADDR	66
+#define MMHI		67
+#define MMLO		68
+#define FPC_CSR		69
+#define FPC_EIR		70
+
+#ifndef _LANGUAGE_ASSEMBLY
+/*
+ * This struct defines the way the registers are stored on the stack during a
+ * system call/exception. As usual the registers k0/k1 aren't being saved.
+ */
+struct pt_regs {
+	/* Pad bytes for argument save space on the stack. */
+	unsigned long pad0[6];
+
+	/* Saved main processor registers. */
+	unsigned long regs[32];
+
+	/* Other saved registers. */
+	unsigned long lo;
+	unsigned long hi;
+
+	/*
+	 * saved cp0 registers
+	 */
+	unsigned long cp0_epc;
+	unsigned long cp0_badvaddr;
+	unsigned long cp0_status;
+	unsigned long cp0_cause;
+};
+
+#endif /* !(_LANGUAGE_ASSEMBLY) */
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+/* #define PTRACE_GETREGS		12 */
+/* #define PTRACE_SETREGS		13 */
+/* #define PTRACE_GETFPREGS		14 */
+/* #define PTRACE_SETFPREGS		15 */
+/* #define PTRACE_GETFPXREGS		18 */
+/* #define PTRACE_SETFPXREGS		19 */
+
+#define PTRACE_SETOPTIONS	21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD	0x00000001
+
+#if 0 /* def _LANGUAGE_ASSEMBLY */
+#include <asm/offset.h>
+#endif
+
+#ifdef __KERNEL__
+
+#ifndef _LANGUAGE_ASSEMBLY
+/*
+ * Does the process account for user or for system time?
+ */
+#define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER)
+
+#define instruction_pointer(regs) ((regs)->cp0_epc)
+
+extern void show_regs(struct pt_regs *);
+#endif /* !(_LANGUAGE_ASSEMBLY) */
+
+#endif
+
+#endif /* _ASM_PTRACE_H */
-- 
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