From 1d2e96de56cc57e25a19bc40d297f36c4c4443a2 Mon Sep 17 00:00:00 2001 From: Dirk Behme Date: Mon, 2 Nov 2009 20:36:26 +0100 Subject: OMAP2/3: I2C: Add support for second and third bus Add support to use second and third I2C bus, too. Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch back afterwards, then. Signed-off-by: Dirk Behme --- include/asm-arm/arch-omap3/i2c.h | 49 ++++++++++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 15 deletions(-) (limited to 'include/asm-arm/arch-omap3') diff --git a/include/asm-arm/arch-omap3/i2c.h b/include/asm-arm/arch-omap3/i2c.h index 8b339cc..490e03b 100644 --- a/include/asm-arm/arch-omap3/i2c.h +++ b/include/asm-arm/arch-omap3/i2c.h @@ -25,21 +25,40 @@ #define I2C_DEFAULT_BASE I2C_BASE1 -#define I2C_REV (I2C_DEFAULT_BASE + 0x00) -#define I2C_IE (I2C_DEFAULT_BASE + 0x04) -#define I2C_STAT (I2C_DEFAULT_BASE + 0x08) -#define I2C_IV (I2C_DEFAULT_BASE + 0x0c) -#define I2C_BUF (I2C_DEFAULT_BASE + 0x14) -#define I2C_CNT (I2C_DEFAULT_BASE + 0x18) -#define I2C_DATA (I2C_DEFAULT_BASE + 0x1c) -#define I2C_SYSC (I2C_DEFAULT_BASE + 0x20) -#define I2C_CON (I2C_DEFAULT_BASE + 0x24) -#define I2C_OA (I2C_DEFAULT_BASE + 0x28) -#define I2C_SA (I2C_DEFAULT_BASE + 0x2c) -#define I2C_PSC (I2C_DEFAULT_BASE + 0x30) -#define I2C_SCLL (I2C_DEFAULT_BASE + 0x34) -#define I2C_SCLH (I2C_DEFAULT_BASE + 0x38) -#define I2C_SYSTEST (I2C_DEFAULT_BASE + 0x3c) +struct i2c { + unsigned short rev; /* 0x00 */ + unsigned short res1; + unsigned short ie; /* 0x04 */ + unsigned short res2; + unsigned short stat; /* 0x08 */ + unsigned short res3; + unsigned short iv; /* 0x0C */ + unsigned short res4[3]; + unsigned short buf; /* 0x14 */ + unsigned short res5; + unsigned short cnt; /* 0x18 */ + unsigned short res6; + unsigned short data; /* 0x1C */ + unsigned short res7; + unsigned short sysc; /* 0x20 */ + unsigned short res8; + unsigned short con; /* 0x24 */ + unsigned short res9; + unsigned short oa; /* 0x28 */ + unsigned short res10; + unsigned short sa; /* 0x2C */ + unsigned short res11; + unsigned short psc; /* 0x30 */ + unsigned short res12; + unsigned short scll; /* 0x34 */ + unsigned short res13; + unsigned short sclh; /* 0x38 */ + unsigned short res14; + unsigned short systest; /* 0x3c */ + unsigned short res15; +}; + +#define I2C_BUS_MAX 3 /* I2C masks */ -- cgit v1.1 From 169a4c804dbaf11facb041b1333d394c6ceb8d68 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Sat, 7 Nov 2009 10:40:47 -0500 Subject: OMAP3:SDRC: Cleanup references to SDP Remove SDP referenced unused defines Signed-off-by: Nishanth Menon --- include/asm-arm/arch-omap3/mem.h | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) (limited to 'include/asm-arm/arch-omap3') diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h index 5b9ac75..5496a61 100644 --- a/include/asm-arm/arch-omap3/mem.h +++ b/include/asm-arm/arch-omap3/mem.h @@ -40,11 +40,8 @@ enum { #define EARLY_INIT 1 /* Slower full frequency range default timings for x32 operation*/ -#define SDP_SDRC_SHARING 0x00000100 -#define SDP_SDRC_MR_0_SDR 0x00000031 - -/* optimized timings good for current shipping parts */ -#define SDP_3430_SDRC_RFR_CTRL_165MHz 0x0004e201 /* 7.8us/6ns - 50=0x4e2 */ +#define SDRC_SHARING 0x00000100 +#define SDRC_MR_0_SDR 0x00000031 #define DLL_OFFSET 0 #define DLL_WRITEDDRCLKX2DIS 1 @@ -91,10 +88,6 @@ enum { #define V_ACTIMB_165 (((TCKE_165 << 12) | (XSR_165 << 0)) | \ (TXP_165 << 8) | (TWTR_165 << 16)) -#define SDP_SDRC_ACTIM_CTRLA_0 V_ACTIMA_165 -#define SDP_SDRC_ACTIM_CTRLB_0 V_ACTIMB_165 -#define SDP_SDRC_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_165MHz - /* * GPMC settings - * Definitions is as per the following format -- cgit v1.1 From 30563a04bff73fd4fbd840b846f4b6459759a839 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Sat, 7 Nov 2009 10:51:24 -0500 Subject: OMAP3:SDRC: introduce DDR types Micron DDR timings based on: http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD Introduce Micron DDR timings and provide CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config options to allow for platform files to setup their timings as per the type of DDR selected Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y Signed-off-by: Nishanth Menon --- include/asm-arm/arch-omap3/mem.h | 91 +++++++++++++++++++++++++++++++--------- 1 file changed, 72 insertions(+), 19 deletions(-) (limited to 'include/asm-arm/arch-omap3') diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h index 5496a61..9439758 100644 --- a/include/asm-arm/arch-omap3/mem.h +++ b/include/asm-arm/arch-omap3/mem.h @@ -68,25 +68,78 @@ enum { * TCKE = 2 * XSR = 120/6 = 20 */ -#define TDAL_165 6 -#define TDPL_165 3 -#define TRRD_165 2 -#define TRCD_165 3 -#define TRP_165 3 -#define TRAS_165 7 -#define TRC_165 10 -#define TRFC_165 21 -#define V_ACTIMA_165 ((TRFC_165 << 27) | (TRC_165 << 22) | \ - (TRAS_165 << 18) | (TRP_165 << 15) | \ - (TRCD_165 << 12) | (TRRD_165 << 9) | \ - (TDPL_165 << 6) | (TDAL_165)) - -#define TWTR_165 1 -#define TCKE_165 1 -#define TXP_165 5 -#define XSR_165 23 -#define V_ACTIMB_165 (((TCKE_165 << 12) | (XSR_165 << 0)) | \ - (TXP_165 << 8) | (TWTR_165 << 16)) +#define INFINEON_TDAL_165 6 +#define INFINEON_TDPL_165 3 +#define INFINEON_TRRD_165 2 +#define INFINEON_TRCD_165 3 +#define INFINEON_TRP_165 3 +#define INFINEON_TRAS_165 7 +#define INFINEON_TRC_165 10 +#define INFINEON_TRFC_165 12 +#define INFINEON_V_ACTIMA_165 ((INFINEON_TRFC_165 << 27) | \ + (INFINEON_TRC_165 << 22) | (INFINEON_TRAS_165 << 18) | \ + (INFINEON_TRP_165 << 15) | (INFINEON_TRCD_165 << 12) | \ + (INFINEON_TRRD_165 << 9) | (INFINEON_TDPL_165 << 6) | \ + (INFINEON_TDAL_165)) + +#define INFINEON_TWTR_165 1 +#define INFINEON_TCKE_165 2 +#define INFINEON_TXP_165 2 +#define INFINEON_XSR_165 20 +#define INFINEON_V_ACTIMB_165 ((INFINEON_TCKE_165 << 12) | \ + (INFINEON_XSR_165 << 0) | (INFINEON_TXP_165 << 8) | \ + (INFINEON_TWTR_165 << 16)) + +/* Micron part of 3430 EVM (165MHz optimized) 6.06ns + * ACTIMA + * TDAL = Twr/Tck + Trp/tck= 15/6 + 18 /6 = 2.5 + 3 = 5.5 -> 6 + * TDPL (Twr) = 15/6 = 2.5 -> 3 + * TRRD = 12/6 = 2 + * TRCD = 18/6 = 3 + * TRP = 18/6 = 3 + * TRAS = 42/6 = 7 + * TRC = 60/6 = 10 + * TRFC = 125/6 = 21 + * ACTIMB + * TWTR = 1 + * TCKE = 1 + * TXSR = 138/6 = 23 + * TXP = 25/6 = 4.1 ~5 + */ +#define MICRON_TDAL_165 6 +#define MICRON_TDPL_165 3 +#define MICRON_TRRD_165 2 +#define MICRON_TRCD_165 3 +#define MICRON_TRP_165 3 +#define MICRON_TRAS_165 7 +#define MICRON_TRC_165 10 +#define MICRON_TRFC_165 21 +#define MICRON_V_ACTIMA_165 ((MICRON_TRFC_165 << 27) | \ + (MICRON_TRC_165 << 22) | (MICRON_TRAS_165 << 18) | \ + (MICRON_TRP_165 << 15) | (MICRON_TRCD_165 << 12) | \ + (MICRON_TRRD_165 << 9) | (MICRON_TDPL_165 << 6) | \ + (MICRON_TDAL_165)) + +#define MICRON_TWTR_165 1 +#define MICRON_TCKE_165 1 +#define MICRON_XSR_165 23 +#define MICRON_TXP_165 5 +#define MICRON_V_ACTIMB_165 ((MICRON_TCKE_165 << 12) | \ + (MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \ + (MICRON_TWTR_165 << 16)) + +#ifdef CONFIG_OMAP3_INFINEON_DDR +#define V_ACTIMA_165 INFINEON_V_ACTIMA_165 +#define V_ACTIMB_165 INFINEON_V_ACTIMB_165 +#endif +#ifdef CONFIG_OMAP3_MICRON_DDR +#define V_ACTIMA_165 MICRON_V_ACTIMA_165 +#define V_ACTIMB_165 MICRON_V_ACTIMB_165 +#endif + +#if !defined(V_ACTIMA_165) || !defined(V_ACTIMB_165) +#error "Please choose the right DDR type in config header" +#endif /* * GPMC settings - -- cgit v1.1 From d414aae552bc229dafcad92028effb4a8306c7a5 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 9 Nov 2009 09:29:34 -0500 Subject: OMAP3: Fix SDRC init Defaults are for Infineon DDR timings. Since none of the supported boards currently do XIP boot, these seem to be faulty. fix the values as per the calculations(ACTIMA,B), conf the sdrc power with pwdnen and wakeupproc bits Signed-off-by: Nishanth Menon --- include/asm-arm/arch-omap3/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/asm-arm/arch-omap3') diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h index 8ab2e39..e51c4f3 100644 --- a/include/asm-arm/arch-omap3/cpu.h +++ b/include/asm-arm/arch-omap3/cpu.h @@ -222,6 +222,7 @@ struct sdrc { #define PAGEPOLICY_HIGH (0x1 << 0) #define SRFRONRESET (0x1 << 7) +#define PWDNEN (0x1 << 2) #define WAKEUPPROC (0x1 << 26) #define DDR_SDRAM (0x1 << 0) -- cgit v1.1