From 41e9b04376a74ee74133368d9f5b18ee033efa55 Mon Sep 17 00:00:00 2001 From: Danny Nold Date: Wed, 30 May 2012 09:10:39 -0500 Subject: ENGR00211117 - U-Boot: Add EPDC splash screen for MX 6DL/S platforms - EPDC Splash support for MX6DL/S Sabre SD - EPDC Splash support for MX6DL/S ARM2 - Currently, splash screen consists of a simple black border around a white screen. Done this way to save in memory footprint. Signed-off-by: Danny Nold --- include/asm-arm/arch-mx6/mx6.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'include/asm-arm/arch-mx6') diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h index 26dd0b3..d03adc9 100644 --- a/include/asm-arm/arch-mx6/mx6.h +++ b/include/asm-arm/arch-mx6/mx6.h @@ -266,15 +266,15 @@ #define CSI_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x64000) #define SIPIX_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x68000) #define SDMA_PORT_HOST_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x6C000) -#define EPXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) -#define EPDC_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x74000) -#define ELCDIF_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x78000) -#define DCP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x7C000) #else #define DCIC1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x64000) #define DCIC2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x68000) #define DMA_REQ_PORT_HOST_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x6C000) #endif +#define EPXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) +#define EPDC_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x74000) +#define ELCDIF_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x78000) +#define DCP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x7C000) /* ATZ#2- On Platform */ #define AIPS2_ON_BASE_ADDR (ATZ2_BASE_ADDR + 0x7C000) @@ -697,8 +697,9 @@ #define CLKCTL_CCGR7 0x84 #define CLKCTL_CMEOR 0x88 -#define ANATOP_USB1 0x10 -#define ANATOP_USB2 0x20 +#define ANATOP_USB1 0x10 +#define ANATOP_USB2 0x20 +#define ANATOP_PLL_VIDEO 0xA0 #define CHIP_TYPE_DQ 0x63000 #define CHIP_TYPE_DL 0x61000 -- cgit v1.1