From fa86d1c0bf3f4c68aa565952f1fcafbe2aa2c050 Mon Sep 17 00:00:00 2001 From: Torsten Fleischer Date: Tue, 17 Apr 2012 05:37:45 +0000 Subject: mxs-i2c: Fix internal address byte order Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory. These devices require that the high byte of the internal address has to be written first. The mxs_i2c driver currently writes the address' low byte first. The following patch fixes the byte order of the internal address that should be written to the I2C device. Signed-off-by: Torsten Fleischer CC: Marek Vasut CC: Stefano Babic CC: Fabio Estevam Acked-by: Marek Vasut Acked-by: Stefano Babic --- drivers/i2c/mxs_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c index c8fea32..48aaaa6 100644 --- a/drivers/i2c/mxs_i2c.c +++ b/drivers/i2c/mxs_i2c.c @@ -97,7 +97,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen, for (i = 0; i < alen; i++) { data >>= 8; - data |= ((char *)&addr)[i] << 24; + data |= ((char *)&addr)[alen - i - 1] << 24; if ((i & 3) == 2) writel(data, &i2c_regs->hw_i2c_data); } -- cgit v1.1