From 87ac27bd5b02262cdca7d4701aabdfb7d9a43507 Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Wed, 29 Oct 2014 13:09:32 +0200 Subject: net: keystone_serdes: add keystone K2L SoC support Keystone2 Lamar SoC uses the same keystone SerDes driver. All Keystone2 EVM boards currently use SerDes driver, so move CONFIG_TI_KEYSTONE_SERDES to common configuration file. Acked-by: Murali Karicheri Signed-off-by: Ivan Khoronzhuk --- drivers/net/keystone_net.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index c8681d0..83eeeda 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -582,7 +582,7 @@ static void keystone2_net_serdes_setup(void) &ks2_serdes_sgmii_156p25mhz, CONFIG_KSNET_SERDES_LANES_PER_SGMII); -#ifdef CONFIG_SOC_K2E +#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L) ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII2_BASE, &ks2_serdes_sgmii_156p25mhz, CONFIG_KSNET_SERDES_LANES_PER_SGMII); -- cgit v1.1 From 6c0fb41a0ac6e83728280c5946f0c7c25ec61da1 Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Wed, 29 Oct 2014 13:09:33 +0200 Subject: net: keystone_net: add Keystone2 K2L SoC support The Keystone2 Lamar SoC uses the same keystone net driver. This patch adds opportunity to use it by K2L SoCs. Acked-by: Murali Karicheri Signed-off-by: Ivan Khoronzhuk --- drivers/net/keystone_net.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 83eeeda..bedab1d 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -315,7 +315,7 @@ int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg) writel(cfg->max_rx_len, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_MAXLEN); writel(cfg->ctl, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_CTL); -#ifdef CONFIG_K2E_EVM +#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L) /* Map RX packet flow priority to 0 */ writel(0, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RX_PRI_MAP); #endif @@ -400,6 +400,9 @@ static int keystone2_eth_open(struct eth_device *dev, bd_t *bis) keystone2_net_serdes_setup(); + if (sys_has_mdio) + keystone2_mdio_reset(mdio_bus); + keystone_sgmii_config(phy_dev, eth_priv->slave_port - 1, eth_priv->sgmii_link_type); -- cgit v1.1 From 35fa0dda0ccee8075b1ef8922e930d5dcdea9f5e Mon Sep 17 00:00:00 2001 From: Hao Zhang Date: Thu, 30 Oct 2014 18:59:43 +0200 Subject: net: phy: marvell: add errata w/a for 88E151* chips As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/88E1514 Rev A0, Errata Section 3.1 Marvell PHY has an errata which requires that certain registers get written in order to restart autonegotiation. Signed-off-by: Hao Zhang Signed-off-by: Ivan Khoronzhuk Reviewed-by: Stefan Roese --- drivers/net/phy/marvell.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index d2ecadc..9437c3b 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -276,6 +276,57 @@ static int m88e1111s_config(struct phy_device *phydev) return 0; } +/** + * m88e1518_phy_writebits - write bits to a register + */ +void m88e1518_phy_writebits(struct phy_device *phydev, + u8 reg_num, u16 offset, u16 len, u16 data) +{ + u16 reg, mask; + + if ((len + offset) >= 16) + mask = 0 - (1 << offset); + else + mask = (1 << (len + offset)) - (1 << offset); + + reg = phy_read(phydev, MDIO_DEVAD_NONE, reg_num); + + reg &= ~mask; + reg |= data << offset; + + phy_write(phydev, MDIO_DEVAD_NONE, reg_num, reg); +} + +static int m88e1518_config(struct phy_device *phydev) +{ + /* + * As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512 + * /88E1514 Rev A0, Errata Section 3.1 + */ + if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00ff); /* page 0xff */ + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x214B); + phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2144); + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0x0C28); + phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2146); + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xB233); + phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x214D); + phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xCC0C); + phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2159); + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000); /* reg page 0 */ + phy_write(phydev, MDIO_DEVAD_NONE, 22, 18); /* reg page 18 */ + /* Write HWCFG_MODE = SGMII to Copper */ + m88e1518_phy_writebits(phydev, 20, 0, 3, 1); + + /* Phy reset */ + m88e1518_phy_writebits(phydev, 20, 15, 1, 1); + phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); /* reg page 18 */ + udelay(100); + } + + return m88e1111s_config(phydev); +} + /* Marvell 88E1118 */ static int m88e1118_config(struct phy_device *phydev) { @@ -493,7 +544,7 @@ static struct phy_driver M88E1518_driver = { .uid = 0x1410dd1, .mask = 0xffffff0, .features = PHY_GBIT_FEATURES, - .config = &m88e1111s_config, + .config = &m88e1518_config, .startup = &m88e1011s_startup, .shutdown = &genphy_shutdown, }; -- cgit v1.1 From 75d7c0b04c552a96de0e09ce5b892fa2e5592c5a Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Tue, 4 Nov 2014 01:39:27 +0200 Subject: dma: keystone_nav: remove spurious qm_cfg verification The verification qm_cfg existence is done at ksnav_init(). So, there is no need to verify it after initialization. Signed-off-by: Ivan Khoronzhuk Reviewed-by: Tom Rini --- drivers/dma/keystone_nav.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'drivers') diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c index 77707c2..dfca75a 100644 --- a/drivers/dma/keystone_nav.c +++ b/drivers/dma/keystone_nav.c @@ -81,9 +81,6 @@ void qm_close(void) { u32 j; - if (qm_cfg == NULL) - return; - queue_close(qm_cfg->qpool_num); qm_cfg->mngr_cfg->link_ram_base0 = 0; @@ -105,9 +102,6 @@ void qm_push(struct qm_host_desc *hd, u32 qnum) { u32 regd; - if (!qm_cfg) - return; - cpu_to_bus((u32 *)hd, sizeof(struct qm_host_desc)/4); regd = (u32)hd | ((sizeof(struct qm_host_desc) >> 4) - 1); writel(regd, &qm_cfg->queue[qnum].ptr_size_thresh); @@ -127,9 +121,6 @@ struct qm_host_desc *qm_pop(u32 qnum) { u32 uhd; - if (!qm_cfg) - return NULL; - uhd = readl(&qm_cfg->queue[qnum].ptr_size_thresh) & ~0xf; if (uhd) cpu_to_bus((u32 *)uhd, sizeof(struct qm_host_desc)/4); @@ -139,9 +130,6 @@ struct qm_host_desc *qm_pop(u32 qnum) struct qm_host_desc *qm_pop_from_free_pool(void) { - if (!qm_cfg) - return NULL; - return qm_pop(qm_cfg->qpool_num); } -- cgit v1.1 From 0b03a931abcc7572489be07bee169a6d9a23832a Mon Sep 17 00:00:00 2001 From: Igor Grinberg Date: Mon, 3 Nov 2014 11:32:23 +0200 Subject: omap: hsmmc: assume cd gpio is active low Switch the default CD GPIO polarity to active low. The current hsmmc driver assumption that the CD GPIO is active high, but in the real hardware, usually the opposite holds. The usual SD card socket has a mechanical switch which is grounded as soon as a card is inserted. Of course there might be some board logic which inverts the signal, but as far as current users are concerned, there is no such logic. Current U-Boot users either not using the CD functionality, or have a different way (e.g. external to SoC GPIO controller) for checking the card presence. This patch also brings the polarity assumption in line with the Linux kernel and adds appropriate comments. This patch also might spare issues once the TWL GPIO driver will be converted to the DM. Signed-off-by: Igor Grinberg Cc: Pantelis Antoniou Cc: Dmitry Lifshitz Reviewed-by: Tom Rini --- drivers/mmc/omap_hsmmc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index ef2cbf9..ffb5284 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -611,7 +611,8 @@ static int omap_hsmmc_getcd(struct mmc *mmc) if (cd_gpio < 0) return 1; - return gpio_get_value(cd_gpio); + /* NOTE: assumes card detect signal is active-low */ + return !gpio_get_value(cd_gpio); } static int omap_hsmmc_getwp(struct mmc *mmc) @@ -624,6 +625,7 @@ static int omap_hsmmc_getwp(struct mmc *mmc) if (wp_gpio < 0) return 0; + /* NOTE: assumes write protect signal is active-high */ return gpio_get_value(wp_gpio); } #endif -- cgit v1.1